Lines Matching refs:getInstr
284 const MachineOperand &MO = SU->getInstr()->getOperand(OperIdx); in addPhysRegDataDeps()
311 RegUse = UseSU->getInstr(); in addPhysRegDataDeps()
314 SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, RegUse, in addPhysRegDataDeps()
327 MachineInstr *MI = SU->getInstr(); in addPhysRegDeps()
347 !DefSU->getInstr()->registerDefIsDead(*Alias))) { in addPhysRegDeps()
353 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); in addPhysRegDeps()
422 MachineInstr *MI = SU->getInstr(); in addVRegDefDeps()
460 MachineInstr *Use = UseSU->getInstr(); in addVRegDefDeps()
506 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); in addVRegDefDeps()
531 const MachineInstr *MI = SU->getInstr(); in addVRegUseDeps()
624 if (MIsNeedChainEdge(AAForDep, MFI, MF.getDataLayout(), SUa->getInstr(), in addChainDependency()
625 SUb->getInstr())) { in addChainDependency()
659 SU->Latency = SchedModel.computeInstrLatency(SU->getInstr()); in initSUnits()
690 const MachineInstr *MI = SU->getInstr(); in collectVRegUses()
1373 SU->getInstr()->dump(); in dumpNode()
1385 SU->getInstr()->print(oss, /*SkipOpers=*/true); in getGraphNodeLabel()
1441 SU->getInstr()->isTransient() ? 0 : 1; in visitPreorder()
1452 RData.SubInstrCount = SU->getInstr()->isTransient() ? 0 : 1; in visitPostorderNode()