Lines Matching refs:createResultReg
257 Reg = createResultReg(TLI.getRegClassFor(VT)); in materializeConstant()
756 CLI.ResultReg = createResultReg(TLI.getRegClassFor(MVT::i64)); in selectPatchpoint()
1310 ResultReg = createResultReg(DstClass); in selectBitCast()
1785 unsigned FastISel::createResultReg(const TargetRegisterClass *RC) { in createResultReg() function in FastISel
1797 unsigned NewOp = createResultReg(RegClass); in constrainOperandRegClass()
1808 unsigned ResultReg = createResultReg(RC); in fastEmitInst_()
1820 unsigned ResultReg = createResultReg(RC); in fastEmitInst_r()
1842 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rr()
1867 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rrr()
1893 unsigned ResultReg = createResultReg(RC); in fastEmitInst_ri()
1916 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rii()
1940 unsigned ResultReg = createResultReg(RC); in fastEmitInst_f()
1960 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rri()
1982 unsigned ResultReg = createResultReg(RC); in fastEmitInst_i()
1998 unsigned ResultReg = createResultReg(TLI.getRegClassFor(RetVT)); in fastEmitInst_extractsubreg()