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Lines Matching refs:SDep

199   void AddPred(SUnit *SU, const SDep &D) {  in AddPred()
207 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred()
218 void ReleasePred(SUnit *SU, const SDep *PredEdge);
225 void CapturePred(SDep *PredEdge);
365 void ScheduleDAGRRList::ReleasePred(SUnit *SU, const SDep *PredEdge) { in ReleasePred()
791 void ScheduleDAGRRList::CapturePred(SDep *PredEdge) { in CapturePred()
1025 SmallVector<SDep, 4> ChainPreds; in CopyAndMoveSuccessors()
1026 SmallVector<SDep, 4> ChainSuccs; in CopyAndMoveSuccessors()
1027 SmallVector<SDep, 4> LoadPreds; in CopyAndMoveSuccessors()
1028 SmallVector<SDep, 4> NodePreds; in CopyAndMoveSuccessors()
1029 SmallVector<SDep, 4> NodeSuccs; in CopyAndMoveSuccessors()
1030 for (SDep &Pred : SU->Preds) { in CopyAndMoveSuccessors()
1038 for (SDep &Succ : SU->Succs) { in CopyAndMoveSuccessors()
1046 for (const SDep &Pred : ChainPreds) { in CopyAndMoveSuccessors()
1051 for (const SDep &Pred : LoadPreds) { in CopyAndMoveSuccessors()
1056 for (const SDep &Pred : NodePreds) { in CopyAndMoveSuccessors()
1060 for (SDep D : NodeSuccs) { in CopyAndMoveSuccessors()
1071 for (SDep D : ChainSuccs) { in CopyAndMoveSuccessors()
1083 SDep D(LoadSU, SDep::Data, 0); in CopyAndMoveSuccessors()
1104 for (SDep &Pred : SU->Preds) in CopyAndMoveSuccessors()
1110 SmallVector<std::pair<SUnit *, SDep>, 4> DelDeps; in CopyAndMoveSuccessors()
1111 for (SDep &Succ : SU->Succs) { in CopyAndMoveSuccessors()
1116 SDep D = Succ; in CopyAndMoveSuccessors()
1149 SmallVector<std::pair<SUnit *, SDep>, 4> DelDeps; in InsertCopiesAndMoveSuccs()
1150 for (SDep &Succ : SU->Succs) { in InsertCopiesAndMoveSuccs()
1155 SDep D = Succ; in InsertCopiesAndMoveSuccs()
1164 AddPred(SuccSU, SDep(CopyFromSU, SDep::Artificial)); in InsertCopiesAndMoveSuccs()
1170 SDep FromDep(SU, SDep::Data, Reg); in InsertCopiesAndMoveSuccs()
1173 SDep ToDep(CopyFromSU, SDep::Data, 0); in InsertCopiesAndMoveSuccs()
1419 AddPred(TrySU, SDep(BtSU, SDep::Artificial)); in PickNodeToScheduleBottomUp()
1470 AddPred(TrySU, SDep(Copies.front(), SDep::Artificial)); in PickNodeToScheduleBottomUp()
1477 AddPred(NewDef, SDep(TrySU, SDep::Artificial)); in PickNodeToScheduleBottomUp()
1845 for (const SDep &Pred : SU->Preds) { in CalcNodeSethiUllmanNumber()
1946 for (const SDep &Pred : SU->Preds) { in HighRegPressure()
1995 for (const SDep &Pred : SU->Preds) { in RegPressureDiff()
2038 for (const SDep &Pred : SU->Preds) { in scheduledNode()
2119 for (const SDep &Pred : SU->Preds) { in unscheduledNode()
2187 for (const SDep &Succ : SU->Succs) { in closestSucc()
2205 for (const SDep &Pred : SU->Preds) { in calcMaxScratches()
2216 for (const SDep &Pred : SU->Preds) { in hasOnlyLiveInOpers()
2238 for (const SDep &Succ : SU->Succs) { in hasOnlyLiveOutUses()
2275 for (const SDep &Pred : SU->Preds) { in initVRegCycle()
2287 for (const SDep &Pred : SU->Preds) { in resetVRegCycle()
2305 for (const SDep &Pred : SU->Preds) { in hasVRegCycleUse()
2703 for (const SDep &Succ : SU->Succs) { in canClobberReachingPhysRegUse()
2705 for (const SDep &SuccPred : SuccSU->Preds) { in canClobberReachingPhysRegUse()
2818 for (const SDep &Pred : SU.Preds) in PrescheduleNodesWithMultipleUses()
2841 for (const SDep &PredSucc : PredSU->Succs) { in PrescheduleNodesWithMultipleUses()
2863 SDep Edge = PredSU->Succs[i]; in PrescheduleNodesWithMultipleUses()
2909 for (const SDep &Succ : DUSU->Succs) { in AddPseudoTwoAddrDeps()
2952 scheduleDAG->AddPred(&SU, SDep(SuccSU, SDep::Artificial)); in AddPseudoTwoAddrDeps()