Lines Matching refs:InOp
662 SDValue InOp = Op.getOperand(0); in SimplifyDemandedBits() local
671 if (InOp.getOpcode() == ISD::SRL && in SimplifyDemandedBits()
672 isa<ConstantSDNode>(InOp.getOperand(1))) { in SimplifyDemandedBits()
674 unsigned C1= cast<ConstantSDNode>(InOp.getOperand(1))->getZExtValue(); in SimplifyDemandedBits()
686 InOp.getOperand(0), NewSA)); in SimplifyDemandedBits()
690 if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt), in SimplifyDemandedBits()
696 if (InOp.getNode()->getOpcode() == ISD::ANY_EXTEND) { in SimplifyDemandedBits()
697 SDValue InnerOp = InOp.getNode()->getOperand(0); in SimplifyDemandedBits()
718 if (InOp.hasOneUse() && in SimplifyDemandedBits()
751 SDValue InOp = Op.getOperand(0); in SimplifyDemandedBits() local
767 if (InOp.getOpcode() == ISD::SHL && in SimplifyDemandedBits()
768 isa<ConstantSDNode>(InOp.getOperand(1))) { in SimplifyDemandedBits()
770 unsigned C1= cast<ConstantSDNode>(InOp.getOperand(1))->getZExtValue(); in SimplifyDemandedBits()
781 InOp.getOperand(0), NewSA)); in SimplifyDemandedBits()
786 if (SimplifyDemandedBits(InOp, InDemandedMask, in SimplifyDemandedBits()
870 SDValue InOp = Op.getOperand(0); in SimplifyDemandedBits() local
873 TLO.DAG.ComputeNumSignBits(InOp) >= VTBits-ShAmt+1; in SimplifyDemandedBits()
886 Op.getValueType(), InOp, in SimplifyDemandedBits()