Lines Matching refs:AArch64
120 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ORRXri)) in tryOrrMovk()
122 .addReg(AArch64::XZR) in tryOrrMovk()
130 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::MOVKXi)) in tryOrrMovk()
187 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ORRXri)) in tryToreplicateChunks()
189 .addReg(AArch64::XZR) in tryToreplicateChunks()
207 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::MOVKXi)) in tryToreplicateChunks()
232 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::MOVKXi)) in tryToreplicateChunks()
370 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ORRXri)) in trySequenceOfOnes()
372 .addReg(AArch64::XZR) in trySequenceOfOnes()
381 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::MOVKXi)) in trySequenceOfOnes()
398 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::MOVKXi)) in trySequenceOfOnes()
420 if (DstReg == AArch64::XZR || DstReg == AArch64::WZR) { in expandMOVImm()
431 unsigned Opc = (BitSize == 32 ? AArch64::ORRWri : AArch64::ORRXri); in expandMOVImm()
435 .addReg(BitSize == 32 ? AArch64::WZR : AArch64::XZR) in expandMOVImm()
539 FirstOpc = (isNeg ? AArch64::MOVNWi : AArch64::MOVZWi); in expandMOVImm()
541 FirstOpc = (isNeg ? AArch64::MOVNXi : AArch64::MOVZXi); in expandMOVImm()
572 unsigned Opc = (BitSize == 32 ? AArch64::MOVKWi : AArch64::MOVKXi); in expandMOVImm()
638 BuildMI(LoadCmpBB, DL, TII->get(AArch64::Bcc)) in expandCMP_SWAP()
641 .addReg(AArch64::NZCV, RegState::Implicit | RegState::Kill); in expandCMP_SWAP()
655 BuildMI(StoreBB, DL, TII->get(AArch64::CBNZW)) in expandCMP_SWAP()
713 BuildMI(LoadCmpBB, DL, TII->get(AArch64::LDAXPX)) in expandCMP_SWAP_128()
717 BuildMI(LoadCmpBB, DL, TII->get(AArch64::SUBSXrs), AArch64::XZR) in expandCMP_SWAP_128()
721 BuildMI(LoadCmpBB, DL, TII->get(AArch64::SBCSXr), AArch64::XZR) in expandCMP_SWAP_128()
724 BuildMI(LoadCmpBB, DL, TII->get(AArch64::Bcc)) in expandCMP_SWAP_128()
727 .addReg(AArch64::NZCV, RegState::Implicit | RegState::Kill); in expandCMP_SWAP_128()
738 BuildMI(StoreBB, DL, TII->get(AArch64::STLXPX), StatusReg) in expandCMP_SWAP_128()
742 BuildMI(StoreBB, DL, TII->get(AArch64::CBNZW)) in expandCMP_SWAP_128()
770 case AArch64::ADDWrr: in expandMI()
771 case AArch64::SUBWrr: in expandMI()
772 case AArch64::ADDXrr: in expandMI()
773 case AArch64::SUBXrr: in expandMI()
774 case AArch64::ADDSWrr: in expandMI()
775 case AArch64::SUBSWrr: in expandMI()
776 case AArch64::ADDSXrr: in expandMI()
777 case AArch64::SUBSXrr: in expandMI()
778 case AArch64::ANDWrr: in expandMI()
779 case AArch64::ANDXrr: in expandMI()
780 case AArch64::BICWrr: in expandMI()
781 case AArch64::BICXrr: in expandMI()
782 case AArch64::ANDSWrr: in expandMI()
783 case AArch64::ANDSXrr: in expandMI()
784 case AArch64::BICSWrr: in expandMI()
785 case AArch64::BICSXrr: in expandMI()
786 case AArch64::EONWrr: in expandMI()
787 case AArch64::EONXrr: in expandMI()
788 case AArch64::EORWrr: in expandMI()
789 case AArch64::EORXrr: in expandMI()
790 case AArch64::ORNWrr: in expandMI()
791 case AArch64::ORNXrr: in expandMI()
792 case AArch64::ORRWrr: in expandMI()
793 case AArch64::ORRXrr: { in expandMI()
798 case AArch64::ADDWrr: Opcode = AArch64::ADDWrs; break; in expandMI()
799 case AArch64::SUBWrr: Opcode = AArch64::SUBWrs; break; in expandMI()
800 case AArch64::ADDXrr: Opcode = AArch64::ADDXrs; break; in expandMI()
801 case AArch64::SUBXrr: Opcode = AArch64::SUBXrs; break; in expandMI()
802 case AArch64::ADDSWrr: Opcode = AArch64::ADDSWrs; break; in expandMI()
803 case AArch64::SUBSWrr: Opcode = AArch64::SUBSWrs; break; in expandMI()
804 case AArch64::ADDSXrr: Opcode = AArch64::ADDSXrs; break; in expandMI()
805 case AArch64::SUBSXrr: Opcode = AArch64::SUBSXrs; break; in expandMI()
806 case AArch64::ANDWrr: Opcode = AArch64::ANDWrs; break; in expandMI()
807 case AArch64::ANDXrr: Opcode = AArch64::ANDXrs; break; in expandMI()
808 case AArch64::BICWrr: Opcode = AArch64::BICWrs; break; in expandMI()
809 case AArch64::BICXrr: Opcode = AArch64::BICXrs; break; in expandMI()
810 case AArch64::ANDSWrr: Opcode = AArch64::ANDSWrs; break; in expandMI()
811 case AArch64::ANDSXrr: Opcode = AArch64::ANDSXrs; break; in expandMI()
812 case AArch64::BICSWrr: Opcode = AArch64::BICSWrs; break; in expandMI()
813 case AArch64::BICSXrr: Opcode = AArch64::BICSXrs; break; in expandMI()
814 case AArch64::EONWrr: Opcode = AArch64::EONWrs; break; in expandMI()
815 case AArch64::EONXrr: Opcode = AArch64::EONXrs; break; in expandMI()
816 case AArch64::EORWrr: Opcode = AArch64::EORWrs; break; in expandMI()
817 case AArch64::EORXrr: Opcode = AArch64::EORXrs; break; in expandMI()
818 case AArch64::ORNWrr: Opcode = AArch64::ORNWrs; break; in expandMI()
819 case AArch64::ORNXrr: Opcode = AArch64::ORNXrs; break; in expandMI()
820 case AArch64::ORRWrr: Opcode = AArch64::ORRWrs; break; in expandMI()
821 case AArch64::ORRXrr: Opcode = AArch64::ORRXrs; break; in expandMI()
834 case AArch64::LOADgot: { in expandMI()
840 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg); in expandMI()
842 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::LDRXui)) in expandMI()
869 case AArch64::MOVaddr: in expandMI()
870 case AArch64::MOVaddrJT: in expandMI()
871 case AArch64::MOVaddrCP: in expandMI()
872 case AArch64::MOVaddrBA: in expandMI()
873 case AArch64::MOVaddrTLS: in expandMI()
874 case AArch64::MOVaddrEXT: { in expandMI()
878 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg) in expandMI()
882 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADDXri)) in expandMI()
893 case AArch64::MOVi32imm: in expandMI()
895 case AArch64::MOVi64imm: in expandMI()
897 case AArch64::RET_ReallyLR: { in expandMI()
899 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::RET)) in expandMI()
900 .addReg(AArch64::LR); in expandMI()
905 case AArch64::CMP_SWAP_8: in expandMI()
906 return expandCMP_SWAP(MBB, MBBI, AArch64::LDAXRB, AArch64::STLXRB, in expandMI()
907 AArch64::SUBSWrx, in expandMI()
909 AArch64::WZR, NextMBBI); in expandMI()
910 case AArch64::CMP_SWAP_16: in expandMI()
911 return expandCMP_SWAP(MBB, MBBI, AArch64::LDAXRH, AArch64::STLXRH, in expandMI()
912 AArch64::SUBSWrx, in expandMI()
914 AArch64::WZR, NextMBBI); in expandMI()
915 case AArch64::CMP_SWAP_32: in expandMI()
916 return expandCMP_SWAP(MBB, MBBI, AArch64::LDAXRW, AArch64::STLXRW, in expandMI()
917 AArch64::SUBSWrs, in expandMI()
919 AArch64::WZR, NextMBBI); in expandMI()
920 case AArch64::CMP_SWAP_64: in expandMI()
922 AArch64::LDAXRX, AArch64::STLXRX, AArch64::SUBSXrs, in expandMI()
924 AArch64::XZR, NextMBBI); in expandMI()
925 case AArch64::CMP_SWAP_128: in expandMI()