Lines Matching defs:Op0IsKill
1478 unsigned AArch64FastISel::emitAdd_ri_(MVT VT, unsigned Op0, bool Op0IsKill, in emitAdd_ri_()
3505 bool Op0IsKill = hasTrivialKill(II->getOperand(0)); in fastLowerIntrinsicCall() local
3868 unsigned AArch64FastISel::emitMul_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, in emitMul_rr()
3888 unsigned AArch64FastISel::emitSMULL_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, in emitSMULL_rr()
3898 unsigned AArch64FastISel::emitUMULL_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, in emitUMULL_rr()
3908 unsigned AArch64FastISel::emitLSL_rr(MVT RetVT, unsigned Op0Reg, bool Op0IsKill, in emitLSL_rr()
3935 bool Op0IsKill, uint64_t Shift, in emitLSL_ri()
4014 unsigned AArch64FastISel::emitLSR_rr(MVT RetVT, unsigned Op0Reg, bool Op0IsKill, in emitLSR_rr()
4042 bool Op0IsKill, uint64_t Shift, in emitLSR_ri()
4135 unsigned AArch64FastISel::emitASR_rr(MVT RetVT, unsigned Op0Reg, bool Op0IsKill, in emitASR_rr()
4163 bool Op0IsKill, uint64_t Shift, in emitASR_ri()
4616 bool Op0IsKill = hasTrivialKill(Op0); in selectShift() local
4640 bool Op0IsKill = hasTrivialKill(I->getOperand(0)); in selectShift() local
4699 bool Op0IsKill = hasTrivialKill(I->getOperand(0)); in selectBitCast() local