3560     unsigned ResultReg1 = 0, ResultReg2 = 0, MulReg = 0;  in fastLowerIntrinsicCall()  local
3593         MulReg = emitSMULL_rr(MVT::i64, LHSReg, LHSIsKill, RHSReg, RHSIsKill);  in fastLowerIntrinsicCall()
3594         unsigned ShiftReg = emitLSR_ri(MVT::i64, MVT::i64, MulReg,  in fastLowerIntrinsicCall()
3596         MulReg = fastEmitInst_extractsubreg(VT, MulReg, /*IsKill=*/true,  in fastLowerIntrinsicCall()
3600         emitSubs_rs(VT, ShiftReg, /*IsKill=*/true, MulReg, /*IsKill=*/false,  in fastLowerIntrinsicCall()
3606         MulReg = emitMul_rr(VT, LHSReg, /*IsKill=*/false, RHSReg,  in fastLowerIntrinsicCall()
3610         emitSubs_rs(VT, SMULHReg, /*IsKill=*/true, MulReg, /*IsKill=*/false,  in fastLowerIntrinsicCall()
3628         MulReg = emitUMULL_rr(MVT::i64, LHSReg, LHSIsKill, RHSReg, RHSIsKill);  in fastLowerIntrinsicCall()
3629         emitSubs_rs(MVT::i64, AArch64::XZR, /*IsKill=*/true, MulReg,  in fastLowerIntrinsicCall()
3632         MulReg = fastEmitInst_extractsubreg(VT, MulReg, /*IsKill=*/true,  in fastLowerIntrinsicCall()
3638         MulReg = emitMul_rr(VT, LHSReg, /*IsKill=*/false, RHSReg,  in fastLowerIntrinsicCall()
3649     if (MulReg) {  in fastLowerIntrinsicCall()
3652               TII.get(TargetOpcode::COPY), ResultReg1).addReg(MulReg);  in fastLowerIntrinsicCall()