Lines Matching refs:RHSReg
162 bool LHSIsKill, unsigned RHSReg, bool RHSIsKill,
168 bool LHSIsKill, unsigned RHSReg, bool RHSIsKill,
173 bool LHSIsKill, unsigned RHSReg, bool RHSIsKill,
198 unsigned RHSReg, bool RHSIsKill, bool WantResult = true);
200 unsigned RHSReg, bool RHSIsKill,
208 bool LHSIsKill, unsigned RHSReg, bool RHSIsKill,
1156 unsigned RHSReg = getRegForValue(SI->getOperand(0)); in emitAddSub() local
1157 if (!RHSReg) in emitAddSub()
1160 return emitAddSub_rx(UseAdd, RetVT, LHSReg, LHSIsKill, RHSReg, in emitAddSub()
1164 unsigned RHSReg = getRegForValue(RHS); in emitAddSub() local
1165 if (!RHSReg) in emitAddSub()
1168 return emitAddSub_rx(UseAdd, RetVT, LHSReg, LHSIsKill, RHSReg, RHSIsKill, in emitAddSub()
1184 unsigned RHSReg = getRegForValue(MulLHS); in emitAddSub() local
1185 if (!RHSReg) in emitAddSub()
1188 ResultReg = emitAddSub_rs(UseAdd, RetVT, LHSReg, LHSIsKill, RHSReg, in emitAddSub()
1209 unsigned RHSReg = getRegForValue(SI->getOperand(0)); in emitAddSub() local
1210 if (!RHSReg) in emitAddSub()
1213 ResultReg = emitAddSub_rs(UseAdd, RetVT, LHSReg, LHSIsKill, RHSReg, in emitAddSub()
1223 unsigned RHSReg = getRegForValue(RHS); in emitAddSub() local
1224 if (!RHSReg) in emitAddSub()
1229 RHSReg = emitIntExt(SrcVT, RHSReg, RetVT, IsZExt); in emitAddSub()
1231 return emitAddSub_rr(UseAdd, RetVT, LHSReg, LHSIsKill, RHSReg, RHSIsKill, in emitAddSub()
1236 bool LHSIsKill, unsigned RHSReg, in emitAddSub_rr() argument
1239 assert(LHSReg && RHSReg && "Invalid register number."); in emitAddSub_rr()
1262 RHSReg = constrainOperandRegClass(II, RHSReg, II.getNumDefs() + 1); in emitAddSub_rr()
1265 .addReg(RHSReg, getKillRegState(RHSIsKill)); in emitAddSub_rr()
1315 bool LHSIsKill, unsigned RHSReg, in emitAddSub_rs() argument
1320 assert(LHSReg && RHSReg && "Invalid register number."); in emitAddSub_rs()
1347 RHSReg = constrainOperandRegClass(II, RHSReg, II.getNumDefs() + 1); in emitAddSub_rs()
1350 .addReg(RHSReg, getKillRegState(RHSIsKill)) in emitAddSub_rs()
1356 bool LHSIsKill, unsigned RHSReg, in emitAddSub_rx() argument
1361 assert(LHSReg && RHSReg && "Invalid register number."); in emitAddSub_rx()
1390 RHSReg = constrainOperandRegClass(II, RHSReg, II.getNumDefs() + 1); in emitAddSub_rx()
1393 .addReg(RHSReg, getKillRegState(RHSIsKill)) in emitAddSub_rx()
1455 unsigned RHSReg = getRegForValue(RHS); in emitFCmp() local
1456 if (!RHSReg) in emitFCmp()
1463 .addReg(RHSReg, getKillRegState(RHSIsKill)); in emitFCmp()
1504 bool LHSIsKill, unsigned RHSReg, in emitSubs_rr() argument
1506 return emitAddSub_rr(/*UseAdd=*/false, RetVT, LHSReg, LHSIsKill, RHSReg, in emitSubs_rr()
1511 bool LHSIsKill, unsigned RHSReg, in emitSubs_rs() argument
1515 return emitAddSub_rs(/*UseAdd=*/false, RetVT, LHSReg, LHSIsKill, RHSReg, in emitSubs_rs()
1563 unsigned RHSReg = getRegForValue(MulLHS); in emitLogicalOp() local
1564 if (!RHSReg) in emitLogicalOp()
1567 ResultReg = emitLogicalOp_rs(ISDOpc, RetVT, LHSReg, LHSIsKill, RHSReg, in emitLogicalOp()
1579 unsigned RHSReg = getRegForValue(SI->getOperand(0)); in emitLogicalOp() local
1580 if (!RHSReg) in emitLogicalOp()
1583 ResultReg = emitLogicalOp_rs(ISDOpc, RetVT, LHSReg, LHSIsKill, RHSReg, in emitLogicalOp()
1590 unsigned RHSReg = getRegForValue(RHS); in emitLogicalOp() local
1591 if (!RHSReg) in emitLogicalOp()
1596 ResultReg = fastEmit_rr(VT, VT, ISDOpc, LHSReg, LHSIsKill, RHSReg, RHSIsKill); in emitLogicalOp()
1652 unsigned RHSReg, bool RHSIsKill, in emitLogicalOp_rs() argument
1684 fastEmitInst_rri(Opc, RC, LHSReg, LHSIsKill, RHSReg, RHSIsKill, in emitLogicalOp_rs()
3587 unsigned RHSReg = getRegForValue(RHS); in fastLowerIntrinsicCall() local
3588 if (!RHSReg) in fastLowerIntrinsicCall()
3593 MulReg = emitSMULL_rr(MVT::i64, LHSReg, LHSIsKill, RHSReg, RHSIsKill); in fastLowerIntrinsicCall()
3606 MulReg = emitMul_rr(VT, LHSReg, /*IsKill=*/false, RHSReg, in fastLowerIntrinsicCall()
3609 RHSReg, RHSIsKill); in fastLowerIntrinsicCall()
3622 unsigned RHSReg = getRegForValue(RHS); in fastLowerIntrinsicCall() local
3623 if (!RHSReg) in fastLowerIntrinsicCall()
3628 MulReg = emitUMULL_rr(MVT::i64, LHSReg, LHSIsKill, RHSReg, RHSIsKill); in fastLowerIntrinsicCall()
3638 MulReg = emitMul_rr(VT, LHSReg, /*IsKill=*/false, RHSReg, in fastLowerIntrinsicCall()
3641 RHSReg, RHSIsKill); in fastLowerIntrinsicCall()