Lines Matching refs:AArch64
191 emitFrameOffset(MBB, I, DL, AArch64::SP, AArch64::SP, Amount, TII); in eliminateCallFramePseudoInstr()
197 emitFrameOffset(MBB, I, DL, AArch64::SP, AArch64::SP, -CalleePopAmount, in eliminateCallFramePseudoInstr()
246 return AArch64::X9; in findScratchNonCalleeSaveRegister()
261 if (LiveRegs.available(MRI, AArch64::X9)) in findScratchNonCalleeSaveRegister()
262 return AArch64::X9; in findScratchNonCalleeSaveRegister()
264 for (unsigned Reg : AArch64::GPR64RegClass) { in findScratchNonCalleeSaveRegister()
268 return AArch64::NoRegister; in findScratchNonCalleeSaveRegister()
283 return findScratchNonCalleeSaveRegister(TmpMBB) != AArch64::NoRegister; in canUseAsPrologue()
328 case AArch64::STPXi: in convertCalleeSaveRestoreToSPPrePostIncDec()
329 NewOpc = AArch64::STPXpre; in convertCalleeSaveRestoreToSPPrePostIncDec()
331 case AArch64::STPDi: in convertCalleeSaveRestoreToSPPrePostIncDec()
332 NewOpc = AArch64::STPDpre; in convertCalleeSaveRestoreToSPPrePostIncDec()
334 case AArch64::STRXui: in convertCalleeSaveRestoreToSPPrePostIncDec()
335 NewOpc = AArch64::STRXpre; in convertCalleeSaveRestoreToSPPrePostIncDec()
338 case AArch64::STRDui: in convertCalleeSaveRestoreToSPPrePostIncDec()
339 NewOpc = AArch64::STRDpre; in convertCalleeSaveRestoreToSPPrePostIncDec()
342 case AArch64::LDPXi: in convertCalleeSaveRestoreToSPPrePostIncDec()
343 NewOpc = AArch64::LDPXpost; in convertCalleeSaveRestoreToSPPrePostIncDec()
345 case AArch64::LDPDi: in convertCalleeSaveRestoreToSPPrePostIncDec()
346 NewOpc = AArch64::LDPDpost; in convertCalleeSaveRestoreToSPPrePostIncDec()
348 case AArch64::LDRXui: in convertCalleeSaveRestoreToSPPrePostIncDec()
349 NewOpc = AArch64::LDRXpost; in convertCalleeSaveRestoreToSPPrePostIncDec()
352 case AArch64::LDRDui: in convertCalleeSaveRestoreToSPPrePostIncDec()
353 NewOpc = AArch64::LDRDpost; in convertCalleeSaveRestoreToSPPrePostIncDec()
359 MIB.addReg(AArch64::SP, RegState::Define); in convertCalleeSaveRestoreToSPPrePostIncDec()
370 assert(MBBI->getOperand(OpndIdx - 1).getReg() == AArch64::SP && in convertCalleeSaveRestoreToSPPrePostIncDec()
391 assert((Opc == AArch64::STPXi || Opc == AArch64::STPDi || in fixupCalleeSaveRestoreStackOffset()
392 Opc == AArch64::STRXui || Opc == AArch64::STRDui || in fixupCalleeSaveRestoreStackOffset()
393 Opc == AArch64::LDPXi || Opc == AArch64::LDPDi || in fixupCalleeSaveRestoreStackOffset()
394 Opc == AArch64::LDRXui || Opc == AArch64::LDRDui) && in fixupCalleeSaveRestoreStackOffset()
398 assert(MI.getOperand(OffsetIdx - 1).getReg() == AArch64::SP && in fixupCalleeSaveRestoreStackOffset()
443 emitFrameOffset(MBB, MBBI, DL, AArch64::SP, AArch64::SP, -NumBytes, TII, in emitPrologue()
464 emitFrameOffset(MBB, MBBI, DL, AArch64::SP, AArch64::SP, -NumBytes, TII, in emitPrologue()
493 emitFrameOffset(MBB, MBBI, DL, AArch64::FP, AArch64::SP, FPOffset, TII, in emitPrologue()
500 unsigned scratchSPReg = AArch64::SP; in emitPrologue()
504 assert(scratchSPReg != AArch64::NoRegister); in emitPrologue()
512 emitFrameOffset(MBB, MBBI, DL, scratchSPReg, AArch64::SP, -NumBytes, TII, in emitPrologue()
519 assert(scratchSPReg != AArch64::SP); in emitPrologue()
532 BuildMI(MBB, MBBI, DL, TII->get(AArch64::ANDXri), AArch64::SP) in emitPrologue()
547 TII->copyPhysReg(MBB, MBBI, DL, RegInfo->getBaseRegister(), AArch64::SP, in emitPrologue()
655 IsTailCallReturn = RetOpcode == AArch64::TCRETURNdi || in emitEpilogue()
656 RetOpcode == AArch64::TCRETURNri; in emitEpilogue()
732 emitFrameOffset(MBB, MBB.getFirstTerminator(), DL, AArch64::SP, AArch64::SP, in emitEpilogue()
752 emitFrameOffset(MBB, LastPopI, DL, AArch64::SP, AArch64::SP, in emitEpilogue()
766 emitFrameOffset(MBB, LastPopI, DL, AArch64::SP, AArch64::FP, in emitEpilogue()
769 emitFrameOffset(MBB, LastPopI, DL, AArch64::SP, AArch64::SP, NumBytes, TII, in emitEpilogue()
776 emitFrameOffset(MBB, MBB.getFirstTerminator(), DL, AArch64::SP, AArch64::SP, in emitEpilogue()
843 FrameReg = AArch64::SP; in resolveFrameIndexReference()
874 RegPairInfo() : Reg1(AArch64::NoRegister), Reg2(AArch64::NoRegister) {} in RegPairInfo()
880 bool isPaired() const { return Reg2 != AArch64::NoRegister; } in isPaired()
907 assert(AArch64::GPR64RegClass.contains(RPI.Reg1) || in computeCalleeSaveRegisterPairs()
908 AArch64::FPR64RegClass.contains(RPI.Reg1)); in computeCalleeSaveRegisterPairs()
909 RPI.IsGPR = AArch64::GPR64RegClass.contains(RPI.Reg1); in computeCalleeSaveRegisterPairs()
914 if ((RPI.IsGPR && AArch64::GPR64RegClass.contains(NextReg)) || in computeCalleeSaveRegisterPairs()
915 (!RPI.IsGPR && AArch64::FPR64RegClass.contains(NextReg))) in computeCalleeSaveRegisterPairs()
934 ((RPI.Reg1 == AArch64::LR && RPI.Reg2 == AArch64::FP) || in computeCalleeSaveRegisterPairs()
989 StrOpc = RPI.isPaired() ? AArch64::STPXi : AArch64::STRXui; in spillCalleeSavedRegisters()
991 StrOpc = RPI.isPaired() ? AArch64::STPDi : AArch64::STRDui; in spillCalleeSavedRegisters()
1010 .addReg(AArch64::SP) in spillCalleeSavedRegisters()
1050 LdrOpc = RPI.isPaired() ? AArch64::LDPXi : AArch64::LDRXui; in restoreCalleeSavedRegisters()
1052 LdrOpc = RPI.isPaired() ? AArch64::LDPDi : AArch64::LDRDui; in restoreCalleeSavedRegisters()
1069 .addReg(AArch64::SP) in restoreCalleeSavedRegisters()
1091 unsigned UnspilledCSGPR = AArch64::NoRegister; in determineCalleeSaves()
1092 unsigned UnspilledCSGPRPaired = AArch64::NoRegister; in determineCalleeSaves()
1096 SavedRegs.set(AArch64::FP); in determineCalleeSaves()
1097 SavedRegs.set(AArch64::LR); in determineCalleeSaves()
1100 unsigned BasePointerReg = AArch64::NoRegister; in determineCalleeSaves()
1117 if (AArch64::GPR64RegClass.contains(Reg) && in determineCalleeSaves()
1130 if (AArch64::GPR64RegClass.contains(PairedReg) && in determineCalleeSaves()
1166 if (UnspilledCSGPR != AArch64::NoRegister) { in determineCalleeSaves()
1182 const TargetRegisterClass *RC = &AArch64::GPR64RegClass; in determineCalleeSaves()