Lines Matching refs:GPR32
449 def : InstAlias<"movk $dst, $imm", (MOVKWi GPR32:$dst, imm0_65535:$imm, 0)>;
451 def : InstAlias<"movn $dst, $imm", (MOVNWi GPR32:$dst, imm0_65535:$imm, 0)>;
453 def : InstAlias<"movz $dst, $imm", (MOVZWi GPR32:$dst, imm0_65535:$imm, 0)>;
472 def : InstAlias<"movz $Rd, $sym", (MOVZWi GPR32:$Rd, movz_symbol_g1:$sym, 16)>;
473 def : InstAlias<"movz $Rd, $sym", (MOVZWi GPR32:$Rd, movz_symbol_g0:$sym, 0)>;
475 def : InstAlias<"movn $Rd, $sym", (MOVNWi GPR32:$Rd, movz_symbol_g1:$sym, 16)>;
476 def : InstAlias<"movn $Rd, $sym", (MOVNWi GPR32:$Rd, movz_symbol_g0:$sym, 0)>;
478 def : InstAlias<"movk $Rd, $sym", (MOVKWi GPR32:$Rd, movk_symbol_g1:$sym, 16)>;
479 def : InstAlias<"movk $Rd, $sym", (MOVKWi GPR32:$Rd, movk_symbol_g0:$sym, 0)>;
499 defm : movw_mov_alias<"MOVZ", MOVZWi, GPR32, 32, 0>;
500 defm : movw_mov_alias<"MOVZ", MOVZWi, GPR32, 32, 16>;
507 defm : movw_mov_alias<"MOVN", MOVNWi, GPR32, 32, 0>;
508 defm : movw_mov_alias<"MOVN", MOVNWi, GPR32, 32, 16>;
522 : Pseudo<(outs GPR32:$dst), (ins i32imm:$src),
523 [(set GPR32:$dst, imm:$src)]>,
608 def : InstAlias<"ngc $dst, $src", (SBCWr GPR32:$dst, WZR, GPR32:$src)>;
610 def : InstAlias<"ngcs $dst, $src", (SBCSWr GPR32:$dst, WZR, GPR32:$src)>;
634 def : Pat<(sub GPR32:$Rn, GPR32:$Rm),
635 (SUBSWrr GPR32:$Rn, GPR32:$Rm)>;
638 def : Pat<(sub GPR32:$Rn, arith_shifted_reg32:$Rm),
639 (SUBSWrs GPR32:$Rn, arith_shifted_reg32:$Rm)>;
653 def : Pat<(add GPR32:$Rn, neg_addsub_shifted_imm32:$imm),
654 (SUBSWri GPR32:$Rn, neg_addsub_shifted_imm32:$imm)>;
657 def : Pat<(sub GPR32:$Rn, neg_addsub_shifted_imm32:$imm),
658 (ADDWri GPR32:$Rn, neg_addsub_shifted_imm32:$imm)>;
667 def : Pat<(AArch64add_flag GPR32:$Rn, neg_addsub_shifted_imm32:$imm),
668 (SUBSWri GPR32:$Rn, neg_addsub_shifted_imm32:$imm)>;
671 def : Pat<(AArch64sub_flag GPR32:$Rn, neg_addsub_shifted_imm32:$imm),
672 (ADDSWri GPR32:$Rn, neg_addsub_shifted_imm32:$imm)>;
677 def : InstAlias<"neg $dst, $src", (SUBWrs GPR32:$dst, WZR, GPR32:$src, 0), 3>;
680 (SUBWrs GPR32:$dst, WZR, GPR32:$src, arith_shift32:$shift), 2>;
684 def : InstAlias<"negs $dst, $src", (SUBSWrs GPR32:$dst, WZR, GPR32:$src, 0), 3>;
687 (SUBSWrs GPR32:$dst, WZR, GPR32:$src, arith_shift32:$shift), 2>;
696 def : Pat<(int_aarch64_udiv GPR32:$Rn, GPR32:$Rm), (UDIVWr $Rn, $Rm)>;
698 def : Pat<(int_aarch64_sdiv GPR32:$Rn, GPR32:$Rm), (SDIVWr $Rn, $Rm)>;
707 def : ShiftAlias<"asrv", ASRVWr, GPR32>;
709 def : ShiftAlias<"lslv", LSLVWr, GPR32>;
711 def : ShiftAlias<"lsrv", LSRVWr, GPR32>;
713 def : ShiftAlias<"rorv", RORVWr, GPR32>;
721 def : Pat<(i32 (mul GPR32:$Rn, GPR32:$Rm)),
722 (MADDWrrr GPR32:$Rn, GPR32:$Rm, WZR)>;
726 def : Pat<(i32 (ineg (mul GPR32:$Rn, GPR32:$Rm))),
727 (MSUBWrrr GPR32:$Rn, GPR32:$Rm, WZR)>;
730 def : Pat<(i32 (mul (ineg GPR32:$Rn), GPR32:$Rm)),
731 (MSUBWrrr GPR32:$Rn, GPR32:$Rm, WZR)>;
742 def : Pat<(i64 (mul (sext GPR32:$Rn), (sext GPR32:$Rm))),
743 (SMADDLrrr GPR32:$Rn, GPR32:$Rm, XZR)>;
744 def : Pat<(i64 (mul (zext GPR32:$Rn), (zext GPR32:$Rm))),
745 (UMADDLrrr GPR32:$Rn, GPR32:$Rm, XZR)>;
747 def : Pat<(i64 (ineg (mul (sext GPR32:$Rn), (sext GPR32:$Rm)))),
748 (SMSUBLrrr GPR32:$Rn, GPR32:$Rm, XZR)>;
749 def : Pat<(i64 (ineg (mul (zext GPR32:$Rn), (zext GPR32:$Rm)))),
750 (UMSUBLrrr GPR32:$Rn, GPR32:$Rm, XZR)>;
752 def : Pat<(i64 (mul (sext GPR32:$Rn), (s64imm_32bit:$C))),
753 (SMADDLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), XZR)>;
754 def : Pat<(i64 (mul (zext GPR32:$Rn), (i64imm_32bit:$C))),
755 (UMADDLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), XZR)>;
760 def : Pat<(i64 (ineg (mul (sext GPR32:$Rn), (s64imm_32bit:$C)))),
761 (SMSUBLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), XZR)>;
762 def : Pat<(i64 (ineg (mul (zext GPR32:$Rn), (i64imm_32bit:$C)))),
763 (UMSUBLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), XZR)>;
768 def : Pat<(i64 (add (mul (sext GPR32:$Rn), (s64imm_32bit:$C)), GPR64:$Ra)),
769 (SMADDLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>;
770 def : Pat<(i64 (add (mul (zext GPR32:$Rn), (i64imm_32bit:$C)), GPR64:$Ra)),
771 (UMADDLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>;
777 def : Pat<(i64 (sub GPR64:$Ra, (mul (sext GPR32:$Rn), (s64imm_32bit:$C)))),
778 (SMSUBLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>;
779 def : Pat<(i64 (sub GPR64:$Ra, (mul (zext GPR32:$Rn), (i64imm_32bit:$C)))),
780 (UMSUBLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>;
801 def CRC32Brr : BaseCRC32<0, 0b00, 0, GPR32, int_aarch64_crc32b, "crc32b">;
802 def CRC32Hrr : BaseCRC32<0, 0b01, 0, GPR32, int_aarch64_crc32h, "crc32h">;
803 def CRC32Wrr : BaseCRC32<0, 0b10, 0, GPR32, int_aarch64_crc32w, "crc32w">;
806 def CRC32CBrr : BaseCRC32<0, 0b00, 1, GPR32, int_aarch64_crc32cb, "crc32cb">;
807 def CRC32CHrr : BaseCRC32<0, 0b01, 1, GPR32, int_aarch64_crc32ch, "crc32ch">;
808 def CRC32CWrr : BaseCRC32<0, 0b10, 1, GPR32, int_aarch64_crc32cw, "crc32cw">;
913 def : InstAlias<"mov $dst, $src", (ORRWrs GPR32:$dst, WZR, GPR32:$src, 0), 2>;
916 def : InstAlias<"mvn $Wd, $Wm", (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, 0), 3>;
920 (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, logical_shift32:$sh), 2>;
925 (ANDSWri WZR, GPR32:$src1, logical_imm32:$src2), 2>;
930 (ANDSWrs WZR, GPR32:$src1, GPR32:$src2, 0), 3>;
935 (ANDSWrs WZR, GPR32:$src1, GPR32:$src2, logical_shift32:$sh), 2>;
940 def : Pat<(not GPR32:$Wm), (ORNWrr WZR, GPR32:$Wm)>;
952 def : Pat<(int_aarch64_rbit GPR32:$Rn), (RBITWr $Rn)>;
959 def : Pat<(cttz GPR32:$Rn),
960 (CLZWr (RBITWr GPR32:$Rn))>;
963 def : Pat<(ctlz (or (shl (xor (sra GPR32:$Rn, (i64 31)), GPR32:$Rn), (i64 1)),
965 (CLSWr GPR32:$Rn)>;
982 def : Pat<(bswap (rotr GPR32:$Rn, (i64 16))), (REV16Wr GPR32:$Rn)>;
991 (EXTRWrri GPR32:$dst, GPR32:$src, GPR32:$src, imm0_31:$shift)>;
995 def : Pat<(rotr GPR32:$Rn, (i64 imm0_31:$imm)),
996 (EXTRWrri GPR32:$Rn, GPR32:$Rn, imm0_31:$imm)>;
1064 def : Pat<(shl GPR32:$Rn, (i64 imm0_31:$imm)),
1065 (UBFMWri GPR32:$Rn, (i64 (i32shift_a imm0_31:$imm)),
1072 def : Pat<(sra GPR32:$Rn, (i64 imm0_31:$imm)),
1073 (SBFMWri GPR32:$Rn, imm0_31:$imm, 31)>;
1079 (SBFMWri GPR32:$dst, GPR32:$src, imm0_31:$shift, 31)>;
1082 def : InstAlias<"sxtb $dst, $src", (SBFMWri GPR32:$dst, GPR32:$src, 0, 7)>;
1084 def : InstAlias<"sxth $dst, $src", (SBFMWri GPR32:$dst, GPR32:$src, 0, 15)>;
1088 def : Pat<(srl GPR32:$Rn, (i64 imm0_31:$imm)),
1089 (UBFMWri GPR32:$Rn, imm0_31:$imm, 31)>;
1094 (UBFMWri GPR32:$dst, GPR32:$src, imm0_31:$shift, 31)>;
1097 def : InstAlias<"uxtb $dst, $src", (UBFMWri GPR32:$dst, GPR32:$src, 0, 7)>;
1099 def : InstAlias<"uxth $dst, $src", (UBFMWri GPR32:$dst, GPR32:$src, 0, 15)>;
1119 def : Pat<(AArch64csinv GPR32:$tval, GPR32:$fval, (i32 imm:$cc), NZCV),
1120 (CSINVWr GPR32:$tval, GPR32:$fval, (i32 imm:$cc))>;
1123 def : Pat<(AArch64csneg GPR32:$tval, GPR32:$fval, (i32 imm:$cc), NZCV),
1124 (CSNEGWr GPR32:$tval, GPR32:$fval, (i32 imm:$cc))>;
1127 def : Pat<(AArch64csinc GPR32:$tval, GPR32:$fval, (i32 imm:$cc), NZCV),
1128 (CSINCWr GPR32:$tval, GPR32:$fval, (i32 imm:$cc))>;
1140 def : Pat<(AArch64csel GPR32:$tval, (i32 -1), (i32 imm:$cc), NZCV),
1141 (CSINVWr GPR32:$tval, WZR, (i32 imm:$cc))>;
1144 def : Pat<(AArch64csel (i32 -1), GPR32:$fval, (i32 imm:$cc), NZCV),
1145 (CSINVWr GPR32:$fval, WZR, (i32 (inv_cond_XFORM imm:$cc)))>;
1153 (CSINCWr GPR32:$dst, WZR, WZR, inv_ccode:$cc)>;
1158 (CSINVWr GPR32:$dst, WZR, WZR, inv_ccode:$cc)>;
1163 (CSINCWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc)>;
1168 (CSINVWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc)>;
1173 (CSNEGWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc)>;
1294 defm LDPW : LoadPairOffset<0b00, 0, GPR32, simm7s4, "ldp">;
1303 def LDPWpre : LoadPairPreIdx<0b00, 0, GPR32, simm7s4, "ldp">;
1312 def LDPWpost : LoadPairPostIdx<0b00, 0, GPR32, simm7s4, "ldp">;
1322 defm LDNPW : LoadPairNoAlloc<0b00, 0, GPR32, simm7s4, "ldnp">;
1333 defm LDRBB : Load8RO<0b00, 0, 0b01, GPR32, "ldrb", i32, zextloadi8>;
1334 defm LDRHH : Load16RO<0b01, 0, 0b01, GPR32, "ldrh", i32, zextloadi16>;
1335 defm LDRW : Load32RO<0b10, 0, 0b01, GPR32, "ldr", i32, load>;
1346 defm LDRSHW : Load16RO<0b01, 0, 0b11, GPR32, "ldrsh", i32, sextloadi16>;
1350 defm LDRSBW : Load8RO<0b00, 0, 0b11, GPR32, "ldrsb", i32, sextloadi8>;
1368 (loadop (ro.Wpat GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$offset))))),
1370 (LOADW GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$offset),
1402 (load (ro_Windexed64 GPR64sp:$Rn, GPR32:$Rm,
1404 (LDRDroW GPR64sp:$Rn, GPR32:$Rm, ro_Wextend64:$extend)>;
1416 def : Pat<(VecTy (load (ro.Wpat GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend))),
1417 (LOADW GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)>;
1452 def : Pat<(i64 (loadop (ro.Wpat GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend))),
1454 (INSTW GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend),
1484 def : Pat<(i32 (loadop (ro.Wpat GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend))),
1485 (INSTW GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)>;
1508 defm LDRW : LoadUI<0b10, 0, 0b01, GPR32, uimm12s4, "ldr",
1509 [(set GPR32:$Rt,
1603 defm LDRHH : LoadUI<0b01, 0, 0b01, GPR32, uimm12s2, "ldrh",
1604 [(set GPR32:$Rt,
1607 defm LDRBB : LoadUI<0b00, 0, 0b01, GPR32, uimm12s1, "ldrb",
1608 [(set GPR32:$Rt,
1640 defm LDRSHW : LoadUI<0b01, 0, 0b11, GPR32, uimm12s2, "ldrsh",
1641 [(set GPR32:$Rt,
1650 defm LDRSBW : LoadUI<0b00, 0, 0b11, GPR32, uimm12s1, "ldrsb",
1651 [(set GPR32:$Rt,
1679 def LDRWl : LoadLiteral<0b00, 0, GPR32, "ldr">;
1697 defm LDURW : LoadUnscaled<0b10, 0, 0b01, GPR32, "ldur",
1698 [(set GPR32:$Rt,
1717 : LoadUnscaled<0b01, 0, 0b01, GPR32, "ldurh",
1718 [(set GPR32:$Rt,
1721 : LoadUnscaled<0b00, 0, 0b01, GPR32, "ldurb",
1722 [(set GPR32:$Rt,
1831 (LDURWi GPR32:$Rt, GPR64sp:$Rn, simm9_offset_fb32:$offset), 0>;
1851 : LoadUnscaled<0b01, 0, 0b11, GPR32, "ldursh",
1852 [(set GPR32:$Rt,
1861 : LoadUnscaled<0b00, 0, 0b11, GPR32, "ldursb",
1862 [(set GPR32:$Rt,
1877 (LDURBBi GPR32:$Rt, GPR64sp:$Rn, simm9_offset_fb8:$offset), 0>;
1879 (LDURHHi GPR32:$Rt, GPR64sp:$Rn, simm9_offset_fb16:$offset), 0>;
1881 (LDURSBWi GPR32:$Rt, GPR64sp:$Rn, simm9_offset_fb8:$offset), 0>;
1885 (LDURSHWi GPR32:$Rt, GPR64sp:$Rn, simm9_offset_fb16:$offset), 0>;
1899 defm LDTRW : LoadUnprivileged<0b10, 0, 0b01, GPR32, "ldtr">;
1901 defm LDTRH : LoadUnprivileged<0b01, 0, 0b01, GPR32, "ldtrh">;
1902 defm LDTRB : LoadUnprivileged<0b00, 0, 0b01, GPR32, "ldtrb">;
1905 defm LDTRSHW : LoadUnprivileged<0b01, 0, 0b11, GPR32, "ldtrsh">;
1909 defm LDTRSBW : LoadUnprivileged<0b00, 0, 0b11, GPR32, "ldtrsb">;
1917 def LDRWpre : LoadPreIdx<0b10, 0, 0b01, GPR32, "ldr">;
1926 def LDRSHWpre : LoadPreIdx<0b01, 0, 0b11, GPR32, "ldrsh">;
1930 def LDRSBWpre : LoadPreIdx<0b00, 0, 0b11, GPR32, "ldrsb">;
1934 def LDRBBpre : LoadPreIdx<0b00, 0, 0b01, GPR32, "ldrb">;
1935 def LDRHHpre : LoadPreIdx<0b01, 0, 0b01, GPR32, "ldrh">;
1942 def LDRWpost : LoadPostIdx<0b10, 0, 0b01, GPR32, "ldr">;
1951 def LDRSHWpost : LoadPostIdx<0b01, 0, 0b11, GPR32, "ldrsh">;
1955 def LDRSBWpost : LoadPostIdx<0b00, 0, 0b11, GPR32, "ldrsb">;
1959 def LDRBBpost : LoadPostIdx<0b00, 0, 0b01, GPR32, "ldrb">;
1960 def LDRHHpost : LoadPostIdx<0b01, 0, 0b01, GPR32, "ldrh">;
1971 defm STPW : StorePairOffset<0b00, 0, GPR32, simm7s4, "stp">;
1978 def STPWpre : StorePairPreIdx<0b00, 0, GPR32, simm7s4, "stp">;
1985 def STPWpost : StorePairPostIdx<0b00, 0, GPR32, simm7s4, "stp">;
1992 defm STNPW : StorePairNoAlloc<0b00, 0, GPR32, simm7s4, "stnp">;
2002 defm STRBB : Store8RO< 0b00, 0, 0b00, GPR32, "strb", i32, truncstorei8>;
2003 defm STRHH : Store16RO<0b01, 0, 0b00, GPR32, "strh", i32, truncstorei16>;
2004 defm STRW : Store32RO<0b10, 0, 0b00, GPR32, "str", i32, store>;
2019 (ro.Wpat GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)),
2021 GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)>;
2039 (ro.Wpat GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)),
2040 (STRW FPR:$Rt, GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)>;
2081 (ro.Wpat GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)),
2083 GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)>;
2106 defm STRW : StoreUI<0b10, 0, 0b00, GPR32, uimm12s4, "str",
2107 [(store GPR32:$Rt,
2123 defm STRHH : StoreUI<0b01, 0, 0b00, GPR32, uimm12s2, "strh",
2124 [(truncstorei16 GPR32:$Rt,
2127 defm STRBB : StoreUI<0b00, 0, 0b00, GPR32, uimm12s1, "strb",
2128 [(truncstorei8 GPR32:$Rt,
2205 defm STURW : StoreUnscaled<0b10, 0, 0b00, GPR32, "stur",
2206 [(store GPR32:$Rt,
2223 defm STURHH : StoreUnscaled<0b01, 0, 0b00, GPR32, "sturh",
2224 [(truncstorei16 GPR32:$Rt,
2226 defm STURBB : StoreUnscaled<0b00, 0, 0b00, GPR32, "sturb",
2227 [(truncstorei8 GPR32:$Rt,
2296 (STURWi GPR32:$Rt, GPR64sp:$Rn, simm9_offset_fb32:$offset), 0>;
2309 (STURBBi GPR32:$Rt, GPR64sp:$Rn, simm9_offset_fb8:$offset), 0>;
2311 (STURHHi GPR32:$Rt, GPR64sp:$Rn, simm9_offset_fb16:$offset), 0>;
2315 defm STTRW : StoreUnprivileged<0b10, 0, 0b00, GPR32, "sttr">;
2318 defm STTRH : StoreUnprivileged<0b01, 0, 0b00, GPR32, "sttrh">;
2319 defm STTRB : StoreUnprivileged<0b00, 0, 0b00, GPR32, "sttrb">;
2323 def STRWpre : StorePreIdx<0b10, 0, 0b00, GPR32, "str", pre_store, i32>;
2331 def STRBBpre : StorePreIdx<0b00, 0, 0b00, GPR32, "strb", pre_truncsti8, i32>;
2332 def STRHHpre : StorePreIdx<0b01, 0, 0b00, GPR32, "strh", pre_truncsti16, i32>;
2377 def STRWpost : StorePostIdx<0b10, 0, 0b00, GPR32, "str", post_store, i32>;
2385 def STRBBpost : StorePostIdx<0b00, 0, 0b00, GPR32, "strb", post_truncsti8, i32>;
2386 def STRHHpost : StorePostIdx<0b01, 0, 0b00, GPR32, "strh", post_truncsti16, i32>;
2433 def LDARW : LoadAcquire <0b10, 1, 1, 0, 1, GPR32, "ldar">;
2435 def LDARB : LoadAcquire <0b00, 1, 1, 0, 1, GPR32, "ldarb">;
2436 def LDARH : LoadAcquire <0b01, 1, 1, 0, 1, GPR32, "ldarh">;
2438 def LDAXRW : LoadExclusive <0b10, 0, 1, 0, 1, GPR32, "ldaxr">;
2440 def LDAXRB : LoadExclusive <0b00, 0, 1, 0, 1, GPR32, "ldaxrb">;
2441 def LDAXRH : LoadExclusive <0b01, 0, 1, 0, 1, GPR32, "ldaxrh">;
2443 def LDXRW : LoadExclusive <0b10, 0, 1, 0, 0, GPR32, "ldxr">;
2445 def LDXRB : LoadExclusive <0b00, 0, 1, 0, 0, GPR32, "ldxrb">;
2446 def LDXRH : LoadExclusive <0b01, 0, 1, 0, 0, GPR32, "ldxrh">;
2448 def STLRW : StoreRelease <0b10, 1, 0, 0, 1, GPR32, "stlr">;
2450 def STLRB : StoreRelease <0b00, 1, 0, 0, 1, GPR32, "stlrb">;
2451 def STLRH : StoreRelease <0b01, 1, 0, 0, 1, GPR32, "stlrh">;
2453 def STLXRW : StoreExclusive<0b10, 0, 0, 0, 1, GPR32, "stlxr">;
2455 def STLXRB : StoreExclusive<0b00, 0, 0, 0, 1, GPR32, "stlxrb">;
2456 def STLXRH : StoreExclusive<0b01, 0, 0, 0, 1, GPR32, "stlxrh">;
2458 def STXRW : StoreExclusive<0b10, 0, 0, 0, 0, GPR32, "stxr">;
2460 def STXRB : StoreExclusive<0b00, 0, 0, 0, 0, GPR32, "stxrb">;
2461 def STXRH : StoreExclusive<0b01, 0, 0, 0, 0, GPR32, "stxrh">;
2463 def LDAXPW : LoadExclusivePair<0b10, 0, 1, 1, 1, GPR32, "ldaxp">;
2466 def LDXPW : LoadExclusivePair<0b10, 0, 1, 1, 0, GPR32, "ldxp">;
2469 def STLXPW : StoreExclusivePair<0b10, 0, 0, 1, 1, GPR32, "stlxp">;
2472 def STXPW : StoreExclusivePair<0b10, 0, 0, 1, 0, GPR32, "stxp">;
2477 def LDLARW : LoadAcquire <0b10, 1, 1, 0, 0, GPR32, "ldlar">;
2479 def LDLARB : LoadAcquire <0b00, 1, 1, 0, 0, GPR32, "ldlarb">;
2480 def LDLARH : LoadAcquire <0b01, 1, 1, 0, 0, GPR32, "ldlarh">;
2483 def STLLRW : StoreRelease <0b10, 1, 0, 0, 0, GPR32, "stllr">;
2485 def STLLRB : StoreRelease <0b00, 1, 0, 0, 0, GPR32, "stllrb">;
2486 def STLLRH : StoreRelease <0b01, 1, 0, 0, 0, GPR32, "stllrh">;
3451 (loadop (ro.Wpat GPR64sp:$Rn, GPR32:$Rm,
3454 (LDRW GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend),
3800 def DUPv8i8gpr : SIMDDupFromMain<0, {?,?,?,?,1}, ".8b", v8i8, V64, GPR32>;
3801 def DUPv16i8gpr : SIMDDupFromMain<1, {?,?,?,?,1}, ".16b", v16i8, V128, GPR32>;
3802 def DUPv4i16gpr : SIMDDupFromMain<0, {?,?,?,1,0}, ".4h", v4i16, V64, GPR32>;
3803 def DUPv8i16gpr : SIMDDupFromMain<1, {?,?,?,1,0}, ".8h", v8i16, V128, GPR32>;
3804 def DUPv2i32gpr : SIMDDupFromMain<0, {?,?,1,0,0}, ".2s", v2i32, V64, GPR32>;
3805 def DUPv4i32gpr : SIMDDupFromMain<1, {?,?,1,0,0}, ".4s", v4i32, V128, GPR32>;
3938 def : Pat<(v16i8 (scalar_to_vector GPR32:$Rn)),
3940 (f32 (COPY_TO_REGCLASS GPR32:$Rn, FPR32)), ssub)>;
3941 def : Pat<(v8i8 (scalar_to_vector GPR32:$Rn)),
3943 (f32 (COPY_TO_REGCLASS GPR32:$Rn, FPR32)), ssub)>;
3945 def : Pat<(v8i16 (scalar_to_vector GPR32:$Rn)),
3947 (f32 (COPY_TO_REGCLASS GPR32:$Rn, FPR32)), ssub)>;
3948 def : Pat<(v4i16 (scalar_to_vector GPR32:$Rn)),
3950 (f32 (COPY_TO_REGCLASS GPR32:$Rn, FPR32)), ssub)>;
4948 def : SExtLoadi8CVTf32Pat<(ro8.Wpat GPR64sp:$Rn, GPR32:$Rm, ro8.Wext:$ext),
4949 (LDRBroW GPR64sp:$Rn, GPR32:$Rm, ro8.Wext:$ext)>;
4968 def : SExtLoadi16CVTf32Pat<(ro16.Wpat GPR64sp:$Rn, GPR32:$Rm, ro16.Wext:$ext),
4969 (LDRHroW GPR64sp:$Rn, GPR32:$Rm, ro16.Wext:$ext)>;
5002 def : SExtLoadi16CVTf64Pat<(ro16.Wpat GPR64sp:$Rn, GPR32:$Rm, ro16.Wext:$ext),
5003 (LDRHroW GPR64sp:$Rn, GPR32:$Rm, ro16.Wext:$ext)>;
5021 def : SExtLoadi32CVTf64Pat<(ro32.Wpat GPR64sp:$Rn, GPR32:$Rm, ro32.Wext:$ext),
5022 (LDRSroW GPR64sp:$Rn, GPR32:$Rm, ro32.Wext:$ext)>;
5301 def def32 : PatLeaf<(i32 GPR32:$src), [{
5309 def : Pat<(i64 (zext def32:$src)), (SUBREG_TO_REG (i64 0), GPR32:$src, sub_32)>;
5313 def : Pat<(i64 (anyext GPR32:$src)),
5314 (INSERT_SUBREG (i64 (IMPLICIT_DEF)), GPR32:$src, sub_32)>;
5318 def : Pat<(i64 (zext GPR32:$src)),
5319 (SUBREG_TO_REG (i32 0), (ORRWrs WZR, GPR32:$src, 0), sub_32)>;
5323 def : Pat<(i64 (sext GPR32:$src)),
5324 (SBFMXri (INSERT_SUBREG (i64 (IMPLICIT_DEF)), GPR32:$src, sub_32), 0, 31)>;
5329 def : Pat<(i32 (sext_inreg GPR32:$src, i16)), (SBFMWri GPR32:$src, 0, 15)>;
5330 def : Pat<(i32 (sext_inreg GPR32:$src, i8)), (SBFMWri GPR32:$src, 0, 7)>;
5331 def : Pat<(i32 (sext_inreg GPR32:$src, i1)), (SBFMWri GPR32:$src, 0, 0)>;
5333 def : Pat<(shl (sext_inreg GPR32:$Rn, i8), (i64 imm0_31:$imm)),
5334 (SBFMWri GPR32:$Rn, (i64 (i32shift_a imm0_31:$imm)),
5340 def : Pat<(shl (sext_inreg GPR32:$Rn, i16), (i64 imm0_31:$imm)),
5341 (SBFMWri GPR32:$Rn, (i64 (i32shift_a imm0_31:$imm)),
5347 def : Pat<(shl (i64 (sext GPR32:$Rn)), (i64 imm0_63:$imm)),
5348 (SBFMXri (INSERT_SUBREG (i64 (IMPLICIT_DEF)), GPR32:$Rn, sub_32),
5359 def : Pat<(sra (sext_inreg GPR32:$Rn, i8), (i64 imm0_7:$imm)),
5360 (SBFMWri GPR32:$Rn, (i64 imm0_7:$imm), 7)>;
5364 def : Pat<(sra (sext_inreg GPR32:$Rn, i16), (i64 imm0_15:$imm)),
5365 (SBFMWri GPR32:$Rn, (i64 imm0_15:$imm), 15)>;
5369 def : Pat<(sra (i64 (sext GPR32:$Rn)), (i64 imm0_31:$imm)),
5370 (SBFMXri (INSERT_SUBREG (i64 (IMPLICIT_DEF)), GPR32:$Rn, sub_32),
5563 def : Pat<(f32 (bitconvert (i32 GPR32:$Xn))),
5564 (COPY_TO_REGCLASS GPR32:$Xn, FPR32)>;
5566 (COPY_TO_REGCLASS FPR32:$Xn, GPR32)>;