Lines Matching refs:b010
388 def : InstAlias<"wfe", (HINT 0b010)>;
399 def CLREX : CRmSystemI<imm0_15, 0b010, "clrex">;
797 def SMULHrr : MulHi<0b010, "smulh", mulhs>;
840 defm LDEOR : LDOPregister<0b010, "eor", 0, 0, "">;
841 defm LDEORA : LDOPregister<0b010, "eor", 1, 0, "a">;
842 defm LDEORL : LDOPregister<0b010, "eor", 0, 1, "l">;
843 defm LDEORAL : LDOPregister<0b010, "eor", 1, 1, "al">;
973 def REVWr : OneWRegData<0b010, "rev", bswap>;
975 def REV32Xr : OneXRegData<0b010, "rev32",
1279 def HLT : ExceptionGeneration<0b010, 0b00, "hlt">;
2943 defm FABD : SIMDThreeSameVectorFP<1,1,0b010,"fabd", int_aarch64_neon_fabd>;
2946 defm FADDP : SIMDThreeSameVectorFP<1,0,0b010,"faddp",int_aarch64_neon_addp>;
2947 defm FADD : SIMDThreeSameVectorFP<0,0,0b010,"fadd", fadd>;
2983 defm FSUB : SIMDThreeSameVectorFP<0,1,0b010,"fsub", fsub>;
3250 defm FABD : SIMDFPThreeScalar<1, 1, 0b010, "fabd", int_aarch64_sisd_fabd>;
3726 defm TRN1 : SIMDZipVector<0b010, "trn1", AArch64trn1>;
5082 defm LD1 : SIMDLdSingleHTied<0, 0b010, 0, "ld1", VecListOneh, GPR64pi2>;
5086 defm LD2 : SIMDLdSingleHTied<1, 0b010, 0, "ld2", VecListTwoh, GPR64pi4>;
5166 defm ST1 : SIMDStSingleH<0, 0b010, 0, "st1", VecListOneh, GPR64pi2>;
5252 defm ST2 : SIMDStSingleH<1, 0b010, 0, "st2", VecListTwoh, GPR64pi4>;
5281 def SHA1Mrrr : SHATiedInstQSV<0b010, "sha1m", int_aarch64_crypto_sha1m>;