Lines Matching refs:getInstr

251     TopRPTracker.getDownwardPressure(SU->getInstr(), pressure, MaxPressure);  in pickNode()
318     RPTracker.setPos(SU->getInstr());  in initRegPressure()
399     TopRPTracker.setPos(SU->getInstr());  in schedule()
1205       MachineInstr *MI = SU->getInstr();  in scheduleInsideBlocks()
1234     Block->schedule((*SUs.begin())->getInstr(), (*SUs.rbegin())->getInstr());  in scheduleInsideBlocks()
1697       if (SITII->isLowLatencyInstruction(*Pred->getInstr())) {  in moveLowLatencies()
1707     if (SITII->isLowLatencyInstruction(*SU->getInstr())) {  in moveLowLatencies()
1728     } else if (SU->getInstr()->getOpcode() == AMDGPU::COPY) {  in moveLowLatencies()
1732         if (SITII->isLowLatencyInstruction(*Succ->getInstr())) {  in moveLowLatencies()
1817     if (SITII->isLowLatencyInstruction(*SU->getInstr())) {  in schedule()
1819       if (SITII->getMemOpBaseRegImmOfs(*SU->getInstr(), BaseLatReg, OffLatReg,  in schedule()
1822     } else if (SITII->isHighLatencyInstruction(*SU->getInstr()))  in schedule()
1890                  << *SU->getInstr());  in schedule()