7323     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2LDRpci), NewVReg1)  in SetupEntryBlockForSjLj()
7329       AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2ORRri), NewVReg2)  in SetupEntryBlockForSjLj()
7336     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2STRi12))  in SetupEntryBlockForSjLj()
7350     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tLDRpci), NewVReg1)  in SetupEntryBlockForSjLj()
7359     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tMOVi8), NewVReg3)  in SetupEntryBlockForSjLj()
7363     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tORR), NewVReg4)  in SetupEntryBlockForSjLj()
7371     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tSTRi))  in SetupEntryBlockForSjLj()
7382     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::LDRi12),  NewVReg1)  in SetupEntryBlockForSjLj()
7387     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::PICADD), NewVReg2)  in SetupEntryBlockForSjLj()
7390     AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::STRi12))  in SetupEntryBlockForSjLj()
7506     AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2LDRi12), NewVReg1)  in EmitSjLjDispatchBlock()
7512       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPri))  in EmitSjLjDispatchBlock()
7517       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVi16), VReg1)  in EmitSjLjDispatchBlock()
7523         AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVTi16), VReg2)  in EmitSjLjDispatchBlock()
7528       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPrr))  in EmitSjLjDispatchBlock()
7539     AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::t2LEApcrelJT),NewVReg3)  in EmitSjLjDispatchBlock()
7544       AddDefaultPred(  in EmitSjLjDispatchBlock()
7556     AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tLDRspi), NewVReg1)  in EmitSjLjDispatchBlock()
7562       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tCMPi8))  in EmitSjLjDispatchBlock()
7577       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tLDRpci))  in EmitSjLjDispatchBlock()
7580       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tCMPr))  in EmitSjLjDispatchBlock()
7591     AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tLSLri), NewVReg2)  in EmitSjLjDispatchBlock()
7597     AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tLEApcrelJT), NewVReg3)  in EmitSjLjDispatchBlock()
7601     AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tADDrr), NewVReg4)  in EmitSjLjDispatchBlock()
7610     AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5)  in EmitSjLjDispatchBlock()
7618       AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tADDrr), NewVReg6)  in EmitSjLjDispatchBlock()
7629     AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::LDRi12), NewVReg1)  in EmitSjLjDispatchBlock()
7635       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPri))  in EmitSjLjDispatchBlock()
7640       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVi16), VReg1)  in EmitSjLjDispatchBlock()
7646         AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVTi16), VReg2)  in EmitSjLjDispatchBlock()
7651       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr))  in EmitSjLjDispatchBlock()
7666       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::LDRcp))  in EmitSjLjDispatchBlock()
7670       AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr))  in EmitSjLjDispatchBlock()
7682       AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::MOVsi), NewVReg3)  in EmitSjLjDispatchBlock()
7686     AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::LEApcrelJT), NewVReg4)  in EmitSjLjDispatchBlock()
7692     AddDefaultPred(  in EmitSjLjDispatchBlock()
7842     AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(LdOpc), Data)  in emitPostLd()
7847     AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(LdOpc), Data)  in emitPostLd()
7853     AddDefaultPred(MIB);  in emitPostLd()
7855     AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(LdOpc), Data)  in emitPostLd()
7859     AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(LdOpc), Data)  in emitPostLd()
7874     AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(StOpc), AddrOut)  in emitPostSt()
7878     AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(StOpc)).addReg(Data)  in emitPostSt()
7884     AddDefaultPred(MIB);  in emitPostSt()
7886     AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(StOpc), AddrOut)  in emitPostSt()
7889     AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(StOpc), AddrOut)  in emitPostSt()
8021     AddDefaultPred(BuildMI(BB, dl,  in EmitStructByval()
8026       AddDefaultPred(BuildMI(BB, dl,  in EmitStructByval()
8043       AddDefaultPred(BuildMI(*BB, MI, dl, TII->get(ARM::tLDRpci)).addReg(  in EmitStructByval()
8046       AddDefaultPred(BuildMI(*BB, MI, dl, TII->get(ARM::LDRcp)).addReg(  in EmitStructByval()
8088     AddDefaultPred(MIB);  in EmitStructByval()
8093     AddDefaultCC(AddDefaultPred(MIB.addReg(varPhi).addImm(UnitSize)));  in EmitStructByval()
8187   AddDefaultCC(AddDefaultPred(BuildMI(*MBB, MI, DL, TII.get(ARM::t2SUBrr),  in EmitLowered__chkstk()
8218   AddDefaultPred(BuildMI(*MBB, MI, DL, TII->get(ARM::t2B)).addMBB(ContBB));  in EmitLowered__dbzchk()
8357       AddDefaultPred(BuildMI(BB, dl,  in EmitInstrWithCustomInserter()
8366       AddDefaultPred(BuildMI(BB, dl,  in EmitInstrWithCustomInserter()
8382       AddDefaultPred(BuildMI(BB, dl, TII->get(ARM::t2B)).addMBB(exitMBB));  in EmitInstrWithCustomInserter()
8445     AddDefaultPred(BuildMI(BB, dl,  in EmitInstrWithCustomInserter()