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Lines Matching refs:DispatchBB

7284                                                MachineBasicBlock *DispatchBB,  in SetupEntryBlockForSjLj()  argument
7300 ARMConstantPoolMBB::Create(F->getContext(), DispatchBB, PCLabelId, PCAdj); in SetupEntryBlockForSjLj()
7463 MachineBasicBlock *DispatchBB = MF->CreateMachineBasicBlock(); in EmitSjLjDispatchBlock() local
7464 DispatchBB->setIsEHPad(); in EmitSjLjDispatchBlock()
7474 DispatchBB->addSuccessor(TrapBB); in EmitSjLjDispatchBlock()
7477 DispatchBB->addSuccessor(DispContBB); in EmitSjLjDispatchBlock()
7480 MF->insert(MF->end(), DispatchBB); in EmitSjLjDispatchBlock()
7486 SetupEntryBlockForSjLj(MI, MBB, DispatchBB, FI); in EmitSjLjDispatchBlock()
7493 MIB = BuildMI(DispatchBB, dl, TII->get(ARM::Int_eh_sjlj_dispatchsetup)); in EmitSjLjDispatchBlock()
7506 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2LDRi12), NewVReg1) in EmitSjLjDispatchBlock()
7512 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPri)) in EmitSjLjDispatchBlock()
7517 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVi16), VReg1) in EmitSjLjDispatchBlock()
7523 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVTi16), VReg2) in EmitSjLjDispatchBlock()
7528 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPrr)) in EmitSjLjDispatchBlock()
7533 BuildMI(DispatchBB, dl, TII->get(ARM::t2Bcc)) in EmitSjLjDispatchBlock()
7556 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tLDRspi), NewVReg1) in EmitSjLjDispatchBlock()
7562 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tCMPi8)) in EmitSjLjDispatchBlock()
7577 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tLDRpci)) in EmitSjLjDispatchBlock()
7580 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tCMPr)) in EmitSjLjDispatchBlock()
7585 BuildMI(DispatchBB, dl, TII->get(ARM::tBcc)) in EmitSjLjDispatchBlock()
7629 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::LDRi12), NewVReg1) in EmitSjLjDispatchBlock()
7635 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPri)) in EmitSjLjDispatchBlock()
7640 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVi16), VReg1) in EmitSjLjDispatchBlock()
7646 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVTi16), VReg2) in EmitSjLjDispatchBlock()
7651 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr)) in EmitSjLjDispatchBlock()
7666 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::LDRcp)) in EmitSjLjDispatchBlock()
7670 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr)) in EmitSjLjDispatchBlock()
7675 BuildMI(DispatchBB, dl, TII->get(ARM::Bcc)) in EmitSjLjDispatchBlock()
7737 BB->addSuccessor(DispatchBB, BranchProbability::getZero()); in EmitSjLjDispatchBlock()