Lines Matching +refs:tablegen +refs:mode +refs:map

1 //===- ARMInstrInfo.td - Target Description for ARM Target -*- tablegen -*-===//
291                                  AssemblerPredicate<"!ModeThumb", "arm-mode">;
410 // Operands that are part of a memory addressing mode.
421 // Branches targeting ARM-mode must be divisible by 4 if they're a raw
427 // Branches targeting Thumb-mode must be divisible by 2 if they're a raw
447 // Target for BLX *from* ARM mode.
1866 /// mode). Used mostly in ARM and Thumb-1 modes.
1965   bits<5> mode;
1971   let Inst{17}    = M; // Enabled if mode is set;
1975   let Inst{4-0}   = mode;
1980   def CPS3p : CPS<(ins imod_op:$imod, iflags_op:$iflags, imm0_31:$mode),
1981                   "$imod\t$iflags, $mode">;
1982 let mode = 0, M = 0 in
1986   def CPS1p : CPS<(ins imm0_31:$mode), "\t$mode">;
2087 // Address computation and loads and stores in PIC mode.
2376   : XI<(outs), (ins imm0_31:$mode), AddrModeNone, 4, IndexModeNone, BrFrm,
2378   bits<5> mode;
2386   let Inst{4-0} = mode;
2389 def SRSDA : SRSI<0, "srsda\tsp, $mode"> {
2392 def SRSDA_UPD : SRSI<1, "srsda\tsp!, $mode"> {
2395 def SRSDB : SRSI<0, "srsdb\tsp, $mode"> {
2398 def SRSDB_UPD : SRSI<1, "srsdb\tsp!, $mode"> {
2401 def SRSIA : SRSI<0, "srsia\tsp, $mode"> {
2404 def SRSIA_UPD : SRSI<1, "srsia\tsp!, $mode"> {
2407 def SRSIB : SRSI<0, "srsib\tsp, $mode"> {
2410 def SRSIB_UPD : SRSI<1, "srsib\tsp!, $mode"> {
2414 def : ARMInstAlias<"srsda $mode", (SRSDA imm0_31:$mode)>;
2415 def : ARMInstAlias<"srsda $mode!", (SRSDA_UPD imm0_31:$mode)>;
2417 def : ARMInstAlias<"srsdb $mode", (SRSDB imm0_31:$mode)>;
2418 def : ARMInstAlias<"srsdb $mode!", (SRSDB_UPD imm0_31:$mode)>;
2420 def : ARMInstAlias<"srsia $mode", (SRSIA imm0_31:$mode)>;
2421 def : ARMInstAlias<"srsia $mode!", (SRSIA_UPD imm0_31:$mode)>;
2423 def : ARMInstAlias<"srsib $mode", (SRSIB imm0_31:$mode)>;
2424 def : ARMInstAlias<"srsib $mode!", (SRSIB_UPD imm0_31:$mode)>;
2485 // Return from exception in Hypervisor mode.
2909 // pseudos map between the two.
3486 // FIXME: Eliminate ADDS/SUBS pseudo opcodes after adding tablegen
5313 // TPsoft is valid for ARM mode only, in case of Thumb mode a tTPsoft pattern
5465 // Tail calls. These patterns also apply to Thumb mode.
5738 // FIXME: We need C++ parser hooks to map the alias to the MOV
5803 // 'it' blocks in ARM mode just validate the predicates. The IT itself