Lines Matching refs:getOperand
80 const MCOperand &Dst = MI->getOperand(0); in printInst()
81 const MCOperand &MO1 = MI->getOperand(1); in printInst()
82 const MCOperand &MO2 = MI->getOperand(2); in printInst()
83 const MCOperand &MO3 = MI->getOperand(3); in printInst()
103 const MCOperand &Dst = MI->getOperand(0); in printInst()
104 const MCOperand &MO1 = MI->getOperand(1); in printInst()
105 const MCOperand &MO2 = MI->getOperand(2); in printInst()
130 if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) { in printInst()
144 if (MI->getOperand(2).getReg() == ARM::SP && in printInst()
145 MI->getOperand(3).getImm() == -4) { in printInst()
149 printRegName(O, MI->getOperand(1).getReg()); in printInst()
159 if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) { in printInst()
173 if (MI->getOperand(2).getReg() == ARM::SP && in printInst()
174 MI->getOperand(4).getImm() == 4) { in printInst()
178 printRegName(O, MI->getOperand(0).getReg()); in printInst()
188 if (MI->getOperand(0).getReg() == ARM::SP) { in printInst()
201 if (MI->getOperand(0).getReg() == ARM::SP) { in printInst()
213 unsigned BaseReg = MI->getOperand(0).getReg(); in printInst()
215 if (MI->getOperand(i).getReg() == BaseReg) in printInst()
244 unsigned Reg = MI->getOperand(isStore ? 1 : 0).getReg(); in printInst()
251 NewMI.addOperand(MI->getOperand(0)); in printInst()
258 NewMI.addOperand(MI->getOperand(i)); in printInst()
274 const MCOperand &Op = MI->getOperand(OpNo); in printOperand()
315 const MCOperand &MO1 = MI->getOperand(OpNum); in printThumbLdrLabelOperand()
345 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegRegOperand()
346 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printSORegRegOperand()
347 const MCOperand &MO3 = MI->getOperand(OpNum + 2); in printSORegRegOperand()
365 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegImmOperand()
366 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printSORegImmOperand()
382 const MCOperand &MO1 = MI->getOperand(Op); in printAM2PreOrOffsetIndexOp()
383 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAM2PreOrOffsetIndexOp()
384 const MCOperand &MO3 = MI->getOperand(Op + 2); in printAM2PreOrOffsetIndexOp()
411 const MCOperand &MO1 = MI->getOperand(Op); in printAddrModeTBB()
412 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAddrModeTBB()
423 const MCOperand &MO1 = MI->getOperand(Op); in printAddrModeTBH()
424 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAddrModeTBH()
435 const MCOperand &MO1 = MI->getOperand(Op); in printAddrMode2Operand()
443 const MCOperand &MO3 = MI->getOperand(Op + 2); in printAddrMode2Operand()
455 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode2OffsetOperand()
456 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode2OffsetOperand()
480 const MCOperand &MO1 = MI->getOperand(Op); in printAM3PreOrOffsetIndexOp()
481 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAM3PreOrOffsetIndexOp()
482 const MCOperand &MO3 = MI->getOperand(Op + 2); in printAM3PreOrOffsetIndexOp()
509 const MCOperand &MO1 = MI->getOperand(Op); in printAddrMode3Operand()
515 assert(ARM_AM::getAM3IdxMode(MI->getOperand(Op + 2).getImm()) != in printAddrMode3Operand()
525 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode3OffsetOperand()
526 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode3OffsetOperand()
543 const MCOperand &MO = MI->getOperand(OpNum); in printPostIdxImm8Operand()
552 const MCOperand &MO1 = MI->getOperand(OpNum); in printPostIdxRegOperand()
553 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printPostIdxRegOperand()
562 const MCOperand &MO = MI->getOperand(OpNum); in printPostIdxImm8s4Operand()
572 ARM_AM::getAM4SubMode(MI->getOperand(OpNum).getImm()); in printLdStmModeOperand()
580 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode5Operand()
581 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode5Operand()
604 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode5FP16Operand()
605 const MCOperand &MO2 = MI->getOperand(OpNum+1); in printAddrMode5FP16Operand()
631 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode6Operand()
632 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode6Operand()
645 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode7Operand()
655 const MCOperand &MO = MI->getOperand(OpNum); in printAddrMode6OffsetOperand()
668 const MCOperand &MO = MI->getOperand(OpNum); in printBitfieldInvMaskImmOperand()
680 unsigned val = MI->getOperand(OpNum).getImm(); in printMemBOption()
687 unsigned val = MI->getOperand(OpNum).getImm(); in printInstSyncBOption()
694 unsigned ShiftOp = MI->getOperand(OpNum).getImm(); in printShiftImmOperand()
708 unsigned Imm = MI->getOperand(OpNum).getImm(); in printPKHLSLShiftImm()
718 unsigned Imm = MI->getOperand(OpNum).getImm(); in printPKHASRShiftImm()
733 printRegName(O, MI->getOperand(i).getReg()); in printRegisterList()
741 unsigned Reg = MI->getOperand(OpNum).getReg(); in printGPRPairOperand()
750 const MCOperand &Op = MI->getOperand(OpNum); in printSetendOperand()
759 const MCOperand &Op = MI->getOperand(OpNum); in printCPSIMod()
765 const MCOperand &Op = MI->getOperand(OpNum); in printCPSIFlag()
778 const MCOperand &Op = MI->getOperand(OpNum); in printMSRMaskOperand()
963 uint32_t Banked = MI->getOperand(OpNum).getImm(); in printBankedRegOperand()
1015 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); in printPredicateOperand()
1027 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); in printMandatoryPredicateOperand()
1034 if (MI->getOperand(OpNum).getReg()) { in printSBitModifierOperand()
1035 assert(MI->getOperand(OpNum).getReg() == ARM::CPSR && in printSBitModifierOperand()
1044 O << MI->getOperand(OpNum).getImm(); in printNoHashImmediate()
1050 O << "p" << MI->getOperand(OpNum).getImm(); in printPImmediate()
1056 O << "c" << MI->getOperand(OpNum).getImm(); in printCImmediate()
1062 O << "{" << MI->getOperand(OpNum).getImm() << "}"; in printCoprocOptionImm()
1074 const MCOperand &MO = MI->getOperand(OpNum); in printAdrLabelOperand()
1096 O << markup("<imm:") << "#" << formatImm(MI->getOperand(OpNum).getImm() * 4) in printThumbS4ImmOperand()
1103 unsigned Imm = MI->getOperand(OpNum).getImm(); in printThumbSRImm()
1112 unsigned Mask = MI->getOperand(OpNum).getImm(); in printThumbITMask()
1113 unsigned Firstcond = MI->getOperand(OpNum - 1).getImm(); in printThumbITMask()
1129 const MCOperand &MO1 = MI->getOperand(Op); in printThumbAddrModeRROperand()
1130 const MCOperand &MO2 = MI->getOperand(Op + 1); in printThumbAddrModeRROperand()
1151 const MCOperand &MO1 = MI->getOperand(Op); in printThumbAddrModeImm5SOperand()
1152 const MCOperand &MO2 = MI->getOperand(Op + 1); in printThumbAddrModeImm5SOperand()
1202 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2SOOperand()
1203 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2SOOperand()
1218 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrModeImm12Operand()
1219 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrModeImm12Operand()
1247 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8Operand()
1248 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm8Operand()
1271 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8s4Operand()
1272 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm8s4Operand()
1301 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm0_1020s4Operand()
1302 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm0_1020s4Operand()
1316 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8OffsetOperand()
1331 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8s4OffsetOperand()
1350 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeSoRegOperand()
1351 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeSoRegOperand()
1352 const MCOperand &MO3 = MI->getOperand(OpNum + 2); in printT2AddrModeSoRegOperand()
1372 const MCOperand &MO = MI->getOperand(OpNum); in printFPImmOperand()
1380 unsigned EncodedImm = MI->getOperand(OpNum).getImm(); in printNEONModImmOperand()
1391 unsigned Imm = MI->getOperand(OpNum).getImm(); in printImmPlusOneOperand()
1398 unsigned Imm = MI->getOperand(OpNum).getImm(); in printRotImmOperand()
1408 MCOperand Op = MI->getOperand(OpNum); in printModImmOperand()
1421 PrintUnsigned = (MI->getOperand(OpNum - 1).getReg() == ARM::PC); in printModImmOperand()
1448 O << markup("<imm:") << "#" << 16 - MI->getOperand(OpNum).getImm() in printFBits16()
1454 O << markup("<imm:") << "#" << 32 - MI->getOperand(OpNum).getImm() in printFBits32()
1461 O << "[" << MI->getOperand(OpNum).getImm() << "]"; in printVectorIndex()
1468 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOne()
1475 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwo()
1488 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpaced()
1505 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThree()
1507 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThree()
1509 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThree()
1520 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFour()
1522 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFour()
1524 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFour()
1526 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFour()
1535 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOneAllLanes()
1543 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoAllLanes()
1561 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeAllLanes()
1563 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThreeAllLanes()
1565 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeAllLanes()
1577 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourAllLanes()
1579 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFourAllLanes()
1581 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourAllLanes()
1583 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFourAllLanes()
1590 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpacedAllLanes()
1607 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpacedAllLanes()
1609 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpacedAllLanes()
1611 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpacedAllLanes()
1622 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpacedAllLanes()
1624 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpacedAllLanes()
1626 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpacedAllLanes()
1628 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpacedAllLanes()
1640 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpaced()
1642 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpaced()
1644 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpaced()
1655 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpaced()
1657 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpaced()
1659 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpaced()
1661 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpaced()