Lines Matching refs:b010

140 def A4_rcmpeq  : T_ALU32_3op<"cmp.eq",  0b011, 0b010, 0, 1>;
187 def A4_cmpbgt  : T_CMP_rrbh<"cmpb.gt",  0b010, 0>;
621   defm loadrh  : ld_idxd_shl<"memh", "LDrih", IntRegs, 0b010>;
714 def S4_storerh_ap : T_ST_absset <"memh", "STrih", IntRegs, 0b010,
789 def S4_storerh_ur : T_StoreAbsReg <"memh", "STrih", IntRegs, 0b010,
1024   defm storerh: ST_Idxd_shl<"memh", "STrih", IntRegs, 0b010>,
1626   defm J4_cmpgtu : NVJrr_base<"cmp.gtu", "CMPGTU", 0b010, 0>, PredRel;
1686   defm J4_cmpgtui : NVJri_base<"cmp.gtu", "CMPGTU", 0b010>, PredRel;
1978   def S4_vxsubaddw : T_S3op_64 < "vxsubaddw", 0b01, 0b010, 0, 1>;
1983   def S4_vxsubaddhr : T_S3op_64 < "vxsubaddh", 0b11, 0b010, 0, 1, 1, 1>;
2201 def M4_and_xor  : T_MType_acc_rr < "&= xor", 0b010, 0b010, 0>;
2208 def M4_and_or   : T_MType_acc_rr < "&= or",  0b010, 0b001, 0>;
2211 def M4_xor_and  : T_MType_acc_rr < "^= and", 0b110, 0b010, 0>;
2214 def M4_or_and   : T_MType_acc_rr < "|= and", 0b010, 0b011, 0>;
2215 def M4_and_and  : T_MType_acc_rr < "&= and", 0b010, 0b000, 0>;
2218 def M4_xor_andn : T_MType_acc_rr < "^= and", 0b001, 0b010, 0, [], 1>;
2315 def S2_ct0p : T_COUNT_LEADING_64<"ct0", 0b111, 0b010>;
2358   let Inst{7-5} = 0b010;
2519 def M4_vrmpyeh_s0 : T_M2_vmpy<"vrmpyweh", 0b010, 0b100, 0, 0, 0>;
2523 def M4_vrmpyoh_s0 : T_M2_vmpy<"vrmpywoh", 0b001, 0b010, 0, 0, 0>;
2524 def M4_vrmpyoh_s1 : T_M2_vmpy<"vrmpywoh", 0b101, 0b010, 1, 0, 0>;
2552 def M4_pmpyw : T_XTYPE_mpy64 < "pmpyw", 0b010, 0b111, 0, 0, 0>;
2747 def A4_vrmaxw  : T_S3op_6 < "vrmaxw",  0b010, 0>;
2748 def A4_vrmaxuw : T_S3op_6 < "vrmaxuw", 0b010, 1>;
3751   defm loadrh  : LD_Abs<"memh",  "LDrih",  IntRegs, u16_1Imm, 0b010>;
3781   def L2_loadrhgp  : T_LoadGP<"memh",  "LDrih",  IntRegs, u16_1Imm, 0b010>;