Lines Matching refs:IntRegs

14 def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
15                           IntRegs:$fval, SETEQ)),
16       (i32 (MUX_rr (i1 (CMPEQrr IntRegs:$lhs, IntRegs:$rhs)),
17                    IntRegs:$tval, IntRegs:$fval))>;
19 def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
20                           IntRegs:$fval, SETNE)),
21       (i32 (MUX_rr (i1 (NOT_p (CMPEQrr IntRegs:$lhs, IntRegs:$rhs))),
22                    IntRegs:$tval, IntRegs:$fval))>;
24 def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
25                           IntRegs:$fval, SETGT)),
26       (i32 (MUX_rr (i1 (CMPGTrr IntRegs:$lhs, IntRegs:$rhs)),
27                    IntRegs:$tval, IntRegs:$fval))>;
29 def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
30                           IntRegs:$fval, SETUGT)),
31       (i32 (MUX_rr (i1 (CMPGTUrr IntRegs:$lhs, IntRegs:$rhs)),
32                    IntRegs:$tval, IntRegs:$fval))>;
36 def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
37                           IntRegs:$fval, SETULT)),
38       (i32 (MUX_rr (i1 (NOT_p (CMPGTUrr IntRegs:$lhs,
39                                          (ADD_ri IntRegs:$rhs, -1)))),
40                    IntRegs:$tval, IntRegs:$fval))>;
42 def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
43                           IntRegs:$fval, SETLT)),
44       (i32 (MUX_rr (i1 (NOT_p (CMPGTrr IntRegs:$lhs,
45                                         (ADD_ri IntRegs:$rhs, -1)))),
46                    IntRegs:$tval, IntRegs:$fval))>;
48 def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
49                           IntRegs:$fval, SETLE)),
50       (i32 (MUX_rr (i1 (NOT_p (CMPGTrr IntRegs:$lhs, IntRegs:$rhs))),
51                    IntRegs:$tval, IntRegs:$fval))>;
53 def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
54                           IntRegs:$fval, SETULE)),
55       (i32 (MUX_rr (i1 (NOT_p (CMPGTUrr IntRegs:$lhs, IntRegs:$rhs))),
56                    IntRegs:$tval, IntRegs:$fval))>;
62 def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
63                           IntRegs:$fval, SETGE)),
64       (i32 (MUX_rr (i1 (CMPGTrr IntRegs:$lhs, (ADD_ri IntRegs:$rhs, -1))),
65                    IntRegs:$tval, IntRegs:$fval))>;
67 def : Pat <(i32 (selectcc IntRegs:$lhs, IntRegs:$rhs, IntRegs:$tval,
68                           IntRegs:$fval, SETUGE)),
69       (i32 (MUX_rr (i1 (CMPGTUrr IntRegs:$lhs, (ADD_ri IntRegs:$rhs, -1))),
70                    IntRegs:$tval, IntRegs:$fval))>;
82 def : Pat <(i32 (selectcc PredRegs:$lhs, PredRegs:$rhs, IntRegs:$tval,
83                           IntRegs:$fval, SETNE)),
84       (i32 (MUX_rr (i1 (XOR_pp PredRegs:$lhs, PredRegs:$rhs)), IntRegs:$tval,
85                    IntRegs:$fval))>;
87 def : Pat <(i32 (selectcc PredRegs:$lhs, PredRegs:$rhs, IntRegs:$tval,
88                           IntRegs:$fval, SETEQ)),
90                    IntRegs:$tval, IntRegs:$fval))>;