• Home
  • Raw
  • Download

Lines Matching refs:VA

433     CCValAssign &VA = ArgLocs[i];  in LowerCCCArguments()  local
434 if (VA.isRegLoc()) { in LowerCCCArguments()
436 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
448 RegInfo.addLiveIn(VA.getLocReg(), VReg); in LowerCCCArguments()
454 if (VA.getLocInfo() == CCValAssign::SExt) in LowerCCCArguments()
456 DAG.getValueType(VA.getValVT())); in LowerCCCArguments()
457 else if (VA.getLocInfo() == CCValAssign::ZExt) in LowerCCCArguments()
459 DAG.getValueType(VA.getValVT())); in LowerCCCArguments()
461 if (VA.getLocInfo() != CCValAssign::Full) in LowerCCCArguments()
462 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerCCCArguments()
468 assert(VA.isMemLoc()); in LowerCCCArguments()
475 VA.getLocMemOffset(), true); in LowerCCCArguments()
479 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; in LowerCCCArguments()
482 << EVT(VA.getLocVT()).getEVTString() in LowerCCCArguments()
486 int FI = MFI->CreateFixedObject(ObjSize, VA.getLocMemOffset(), true); in LowerCCCArguments()
492 VA.getLocVT(), dl, Chain, FIN, in LowerCCCArguments()
530 CCValAssign &VA = RVLocs[i]; in LowerReturn() local
531 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
533 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), in LowerReturn()
539 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
582 CCValAssign &VA = ArgLocs[i]; in LowerCCCCallTo() local
587 switch (VA.getLocInfo()) { in LowerCCCCallTo()
591 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
594 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
597 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
603 if (VA.isRegLoc()) { in LowerCCCCallTo()
604 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo()
606 assert(VA.isMemLoc()); in LowerCCCCallTo()
613 DAG.getIntPtrConstant(VA.getLocMemOffset(), dl)); in LowerCCCCallTo()