Lines Matching refs:createResultReg
279 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLogicalOp()
298 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in fastMaterializeAlloca()
319 unsigned ResultReg = createResultReg(RC); in materialize32BitInt()
333 unsigned TmpReg = createResultReg(RC); in materialize32BitInt()
348 unsigned DestReg = createResultReg(RC); in materializeFP()
354 unsigned DestReg = createResultReg(RC); in materializeFP()
369 unsigned DestReg = createResultReg(RC); in materializeGV()
380 unsigned TempReg = createResultReg(RC); in materializeGV()
391 unsigned DestReg = createResultReg(RC); in materializeExternalCallSym()
610 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
616 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
630 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
636 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
650 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
656 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
702 unsigned RegWithZero = createResultReg(&Mips::GPR32RegClass); in emitCmp()
703 unsigned RegWithOne = createResultReg(&Mips::GPR32RegClass); in emitCmp()
725 ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLoad()
730 ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLoad()
735 ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLoad()
742 ResultReg = createResultReg(&Mips::FGR32RegClass); in emitLoad()
749 ResultReg = createResultReg(&Mips::AFGR64RegClass); in emitLoad()
926 unsigned CondReg = createResultReg(&Mips::GPR32RegClass); in selectBranch()
940 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectCmp()
964 unsigned DestReg = createResultReg(&Mips::AFGR64RegClass); in selectFPExt()
1001 unsigned ZExtCondReg = createResultReg(&Mips::GPR32RegClass); in selectSelect()
1008 unsigned ResultReg = createResultReg(RC); in selectSelect()
1009 unsigned TempReg = createResultReg(RC); in selectSelect()
1036 unsigned DestReg = createResultReg(&Mips::FGR32RegClass); in selectFPTrunc()
1074 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in selectFPToInt()
1075 unsigned TempReg = createResultReg(&Mips::FGR32RegClass); in selectFPToInt()
1238 unsigned ResultReg = createResultReg(TLI.getRegClassFor(CopyVT)); in finishCall()
1356 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall()
1367 TempReg[i] = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall()
1380 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall()
1388 TempReg[i] = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall()
1568 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectIntExt()
1588 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitIntSExt32r1()
1656 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in emitIntExt()
1692 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectDivRem()
1711 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectShift()
1723 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in selectShift()
1847 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in getRegEnsuringSimpleIntegerWidening()
1859 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in simplifyAddress()
1877 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rr()