139   unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
140   bool emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg,
1005   if (!emitIntExt(MVT::i1, CondReg, MVT::i32, ZExtCondReg, true))  in selectSelect()
1155       ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false);  in processCallArgs()
1163       ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true);  in processCallArgs()
1506         SrcReg = emitIntExt(RVVT, SrcReg, DestVT, IsZExt);  in selectRet()
1570   if (!emitIntExt(SrcVT, SrcReg, DestVT, ResultReg, isZExt))  in selectIntExt()
1640 bool MipsFastISel::emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,  in emitIntExt()  function in MipsFastISel
1654 unsigned MipsFastISel::emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,  in emitIntExt()  function in MipsFastISel
1657   bool Success = emitIntExt(SrcVT, SrcReg, DestVT, DestReg, isZExt);  in emitIntExt()
1729     if (!emitIntExt(Op0MVT, Op0Reg, MVT::i32, TempReg, IsZExt))  in selectShift()
1848     if (!emitIntExt(VMVT, VReg, MVT::i32, TempReg, IsUnsigned))  in getRegEnsuringSimpleIntegerWidening()