107       BuildMI(MBB, I, DL, get(Mips::RDDSP), DestReg).addImm(1 << 4)  in copyPhysReg()
128       BuildMI(MBB, I, DL, get(Mips::WRDSP))  in copyPhysReg()
133       BuildMI(MBB, I, DL, get(Mips::CTCMSA))  in copyPhysReg()
170   MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc));  in copyPhysReg()
232       BuildMI(MBB, I, DL, get(Mips::MFHI), Mips::K0);  in storeRegToStack()
235       BuildMI(MBB, I, DL, get(Mips::MFHI64), Mips::K0_64);  in storeRegToStack()
238       BuildMI(MBB, I, DL, get(Mips::MFLO), Mips::K0);  in storeRegToStack()
241       BuildMI(MBB, I, DL, get(Mips::MFLO64), Mips::K0_64);  in storeRegToStack()
247   BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill))  in storeRegToStack()
303     BuildMI(MBB, I, DL, get(Opc), DestReg)  in loadRegFromStack()
323     BuildMI(MBB, I, DL, get(Opc), Reg)  in loadRegFromStack()
327     BuildMI(MBB, I, DL, get(LdOp)).addReg(Reg);  in loadRegFromStack()
450     BuildMI(MBB, I, DL, get(ADDiu), SP).addReg(SP).addImm(Amount);  in adjustStackPtr()
460     BuildMI(MBB, I, DL, get(Opc), SP).addReg(SP).addReg(Reg, RegState::Kill);  in adjustStackPtr()
492     BuildMI(MBB, II, DL, get(LUi), Reg).addImm(SignExtend64<16>(Inst->ImmOpnd));  in loadImmediate()
494     BuildMI(MBB, II, DL, get(Inst->Opc), Reg).addReg(ZEROReg)  in loadImmediate()
499     BuildMI(MBB, II, DL, get(Inst->Opc), Reg).addReg(Reg, RegState::Kill)  in loadImmediate()
525     BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn64))  in expandRetRA()
528     BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn)).addReg(Mips::RA);  in expandRetRA()
533   BuildMI(MBB, I, I->getDebugLoc(), get(Mips::ERET));  in expandERet()
551   BuildMI(MBB, I, I->getDebugLoc(), get(NewOpc), I->getOperand(0).getReg());  in expandPseudoMFHiLo()
567   MachineInstrBuilder LoInst = BuildMI(MBB, I, DL, get(LoOpc));  in expandPseudoMTLoHi()
568   MachineInstrBuilder HiInst = BuildMI(MBB, I, DL, get(HiOpc));  in expandPseudoMTLoHi()
604   BuildMI(MBB, I, DL, MovDesc, TmpReg).addReg(SrcReg, KillSrc);  in expandCvtFPInt()
605   BuildMI(MBB, I, DL, CvtDesc, DstReg).addReg(TmpReg, RegState::Kill);  in expandCvtFPInt()
641     BuildMI(MBB, I, dl, get(FP64 ? Mips::MFHC1_D64 : Mips::MFHC1_D32), DstReg)  in expandExtractElementF64()
644     BuildMI(MBB, I, dl, get(Mips::MFC1), DstReg).addReg(SubReg);  in expandExtractElementF64()
679   BuildMI(MBB, I, dl, Mtc1Tdd, TRI.getSubReg(DstReg, Mips::sub_lo))  in expandBuildPairF64()
694     BuildMI(MBB, I, dl, get(FP64 ? Mips::MTHC1_D64 : Mips::MTHC1_D32), DstReg)  in expandBuildPairF64()
700     BuildMI(MBB, I, dl, Mtc1Tdd, TRI.getSubReg(DstReg, Mips::sub_hi))  in expandBuildPairF64()
723     BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), T9)  in expandEhReturn()
726   BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), RA)  in expandEhReturn()
729   BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), SP).addReg(SP).addReg(OffsetReg);  in expandEhReturn()