Lines Matching refs:TempReg
752 unsigned TempReg = isPPC64 ? PPC::X12 : PPC::R12; // another scratch reg in emitPrologue() local
783 &ScratchReg, &TempReg); in emitPrologue()
787 SingleScratchReg = ScratchReg == TempReg; in emitPrologue()
850 BuildMI(MBB, MBBI, dl, TII.get(MfcrOpcode), TempReg); in emitPrologue()
854 .addReg(TempReg, getKillRegState(true)) in emitPrologue()
875 BuildMI(MBB, MBBI, dl, TII.get(MfcrOpcode), TempReg); in emitPrologue()
911 .addReg(TempReg, getKillRegState(true)) in emitPrologue()
947 BuildMI(MBB, MBBI, dl, LoadImmShiftedInst, TempReg) in emitPrologue()
949 BuildMI(MBB, MBBI, dl, OrImmInst, TempReg) in emitPrologue()
950 .addReg(TempReg, RegState::Kill) in emitPrologue()
954 .addReg(TempReg, RegState::Kill); in emitPrologue()
1133 unsigned TempReg = isPPC64 ? PPC::X12 : PPC::R12; // another scratch reg in emitEpilogue() local
1153 &TempReg); in emitEpilogue()
1157 SingleScratchReg = ScratchReg == TempReg; in emitEpilogue()
1261 BuildMI(MBB, MBBI, dl, TII.get(PPC::LWZ8), TempReg) in emitEpilogue()
1266 .addReg(TempReg, getKillRegState(i == e-1)); in emitEpilogue()
1276 BuildMI(MBB, MBBI, dl, TII.get(PPC::LWZ8), TempReg) in emitEpilogue()
1301 .addReg(TempReg, getKillRegState(i == e-1)); in emitEpilogue()