Lines Matching refs:PPC
61 : PPCGenRegisterInfo(TM.isPPC64() ? PPC::LR8 : PPC::LR, in PPCRegisterInfo()
65 ImmToIdxMap[PPC::LD] = PPC::LDX; ImmToIdxMap[PPC::STD] = PPC::STDX; in PPCRegisterInfo()
66 ImmToIdxMap[PPC::LBZ] = PPC::LBZX; ImmToIdxMap[PPC::STB] = PPC::STBX; in PPCRegisterInfo()
67 ImmToIdxMap[PPC::LHZ] = PPC::LHZX; ImmToIdxMap[PPC::LHA] = PPC::LHAX; in PPCRegisterInfo()
68 ImmToIdxMap[PPC::LWZ] = PPC::LWZX; ImmToIdxMap[PPC::LWA] = PPC::LWAX; in PPCRegisterInfo()
69 ImmToIdxMap[PPC::LFS] = PPC::LFSX; ImmToIdxMap[PPC::LFD] = PPC::LFDX; in PPCRegisterInfo()
70 ImmToIdxMap[PPC::STH] = PPC::STHX; ImmToIdxMap[PPC::STW] = PPC::STWX; in PPCRegisterInfo()
71 ImmToIdxMap[PPC::STFS] = PPC::STFSX; ImmToIdxMap[PPC::STFD] = PPC::STFDX; in PPCRegisterInfo()
72 ImmToIdxMap[PPC::ADDI] = PPC::ADD4; in PPCRegisterInfo()
73 ImmToIdxMap[PPC::LWA_32] = PPC::LWAX_32; in PPCRegisterInfo()
76 ImmToIdxMap[PPC::LHA8] = PPC::LHAX8; ImmToIdxMap[PPC::LBZ8] = PPC::LBZX8; in PPCRegisterInfo()
77 ImmToIdxMap[PPC::LHZ8] = PPC::LHZX8; ImmToIdxMap[PPC::LWZ8] = PPC::LWZX8; in PPCRegisterInfo()
78 ImmToIdxMap[PPC::STB8] = PPC::STBX8; ImmToIdxMap[PPC::STH8] = PPC::STHX8; in PPCRegisterInfo()
79 ImmToIdxMap[PPC::STW8] = PPC::STWX8; ImmToIdxMap[PPC::STDU] = PPC::STDUX; in PPCRegisterInfo()
80 ImmToIdxMap[PPC::ADDI8] = PPC::ADD8; in PPCRegisterInfo()
92 return &PPC::G8RC_NOX0RegClass; in getPointerRegClass()
93 return &PPC::GPRC_NOR0RegClass; in getPointerRegClass()
97 return &PPC::G8RCRegClass; in getPointerRegClass()
98 return &PPC::GPRCRegClass; in getPointerRegClass()
123 bool SaveR2 = MF->getRegInfo().isAllocatable(PPC::X2); in getCalleeSavedRegs()
148 bool SaveR2 = !getReservedRegs(*MF).test(PPC::X2); in getCalleeSavedRegsViaCopy()
189 for (unsigned PseudoReg : {PPC::ZERO, PPC::ZERO8, PPC::RM}) in adjustStackMapLiveOutMask()
200 Reserved.set(PPC::ZERO); in getReservedRegs()
201 Reserved.set(PPC::ZERO8); in getReservedRegs()
205 Reserved.set(PPC::FP); in getReservedRegs()
206 Reserved.set(PPC::FP8); in getReservedRegs()
210 Reserved.set(PPC::BP); in getReservedRegs()
211 Reserved.set(PPC::BP8); in getReservedRegs()
215 Reserved.set(PPC::CTR); in getReservedRegs()
216 Reserved.set(PPC::CTR8); in getReservedRegs()
218 Reserved.set(PPC::R1); in getReservedRegs()
219 Reserved.set(PPC::LR); in getReservedRegs()
220 Reserved.set(PPC::LR8); in getReservedRegs()
221 Reserved.set(PPC::RM); in getReservedRegs()
224 Reserved.set(PPC::VRSAVE); in getReservedRegs()
228 Reserved.set(PPC::R2); // System-reserved register in getReservedRegs()
229 Reserved.set(PPC::R13); // Small Data Area pointer register in getReservedRegs()
234 Reserved.set(PPC::R13); in getReservedRegs()
236 Reserved.set(PPC::X1); in getReservedRegs()
237 Reserved.set(PPC::X13); in getReservedRegs()
240 Reserved.set(PPC::X31); in getReservedRegs()
243 Reserved.set(PPC::X30); in getReservedRegs()
254 Reserved.set(PPC::X2); in getReservedRegs()
256 Reserved.reset(PPC::R2); in getReservedRegs()
261 Reserved.set(PPC::R31); in getReservedRegs()
266 Reserved.set(PPC::R29); in getReservedRegs()
268 Reserved.set(PPC::R30); in getReservedRegs()
272 Reserved.set(PPC::R30); in getReservedRegs()
276 for (TargetRegisterClass::iterator I = PPC::VRRCRegClass.begin(), in getReservedRegs()
277 IE = PPC::VRRCRegClass.end(); I != IE; ++I) in getReservedRegs()
291 case PPC::G8RC_NOX0RegClassID: in getRegPressureLimit()
292 case PPC::GPRC_NOR0RegClassID: in getRegPressureLimit()
293 case PPC::G8RCRegClassID: in getRegPressureLimit()
294 case PPC::GPRCRegClassID: { in getRegPressureLimit()
298 case PPC::F8RCRegClassID: in getRegPressureLimit()
299 case PPC::F4RCRegClassID: in getRegPressureLimit()
300 case PPC::QFRCRegClassID: in getRegPressureLimit()
301 case PPC::QSRCRegClassID: in getRegPressureLimit()
302 case PPC::QBRCRegClassID: in getRegPressureLimit()
303 case PPC::VRRCRegClassID: in getRegPressureLimit()
304 case PPC::VFRCRegClassID: in getRegPressureLimit()
305 case PPC::VSLRCRegClassID: in getRegPressureLimit()
306 case PPC::VSHRCRegClassID: in getRegPressureLimit()
308 case PPC::VSRCRegClassID: in getRegPressureLimit()
309 case PPC::VSFRCRegClassID: in getRegPressureLimit()
310 case PPC::VSSRCRegClassID: in getRegPressureLimit()
312 case PPC::CRRCRegClassID: in getRegPressureLimit()
325 if (RC == &PPC::F8RCRegClass) in getLargestLegalSuperClass()
326 return &PPC::VSFRCRegClass; in getLargestLegalSuperClass()
327 else if (RC == &PPC::VRRCRegClass) in getLargestLegalSuperClass()
328 return &PPC::VSRCRegClass; in getLargestLegalSuperClass()
329 else if (RC == &PPC::F4RCRegClass && Subtarget.hasP8Vector()) in getLargestLegalSuperClass()
330 return &PPC::VSSRCRegClass; in getLargestLegalSuperClass()
381 const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; in lowerDynamicAlloc()
382 const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; in lowerDynamicAlloc()
386 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), Reg) in lowerDynamicAlloc()
387 .addReg(PPC::R31) in lowerDynamicAlloc()
390 BuildMI(MBB, II, dl, TII.get(PPC::LD), Reg) in lowerDynamicAlloc()
392 .addReg(PPC::X1); in lowerDynamicAlloc()
394 BuildMI(MBB, II, dl, TII.get(PPC::LWZ), Reg) in lowerDynamicAlloc()
396 .addReg(PPC::R1); in lowerDynamicAlloc()
411 BuildMI(MBB, II, dl, TII.get(PPC::LI8), NegSizeReg) in lowerDynamicAlloc()
416 BuildMI(MBB, II, dl, TII.get(PPC::AND8), NegSizeReg) in lowerDynamicAlloc()
422 BuildMI(MBB, II, dl, TII.get(PPC::STDUX), PPC::X1) in lowerDynamicAlloc()
424 .addReg(PPC::X1) in lowerDynamicAlloc()
426 BuildMI(MBB, II, dl, TII.get(PPC::ADDI8), MI.getOperand(0).getReg()) in lowerDynamicAlloc()
427 .addReg(PPC::X1) in lowerDynamicAlloc()
436 BuildMI(MBB, II, dl, TII.get(PPC::LI), NegSizeReg) in lowerDynamicAlloc()
441 BuildMI(MBB, II, dl, TII.get(PPC::AND), NegSizeReg) in lowerDynamicAlloc()
447 BuildMI(MBB, II, dl, TII.get(PPC::STWUX), PPC::R1) in lowerDynamicAlloc()
449 .addReg(PPC::R1) in lowerDynamicAlloc()
451 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), MI.getOperand(0).getReg()) in lowerDynamicAlloc()
452 .addReg(PPC::R1) in lowerDynamicAlloc()
476 BuildMI(MBB, II, dl, TII.get(PPC::LI), MI.getOperand(0).getReg()) in lowerDynamicAreaOffset()
501 const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; in lowerCRSpilling()
502 const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; in lowerCRSpilling()
509 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), Reg) in lowerCRSpilling()
514 if (SrcReg != PPC::CR0) { in lowerCRSpilling()
519 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWINM8 : PPC::RLWINM), Reg) in lowerCRSpilling()
526 addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::STW8 : PPC::STW)) in lowerCRSpilling()
546 const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; in lowerCRRestore()
547 const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; in lowerCRRestore()
554 addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::LWZ8 : PPC::LWZ), in lowerCRRestore()
559 if (DestReg != PPC::CR0) { in lowerCRRestore()
565 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWINM8 : PPC::RLWINM), Reg) in lowerCRRestore()
570 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MTOCRF8 : PPC::MTOCRF), DestReg) in lowerCRRestore()
589 const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; in lowerCRBitSpilling()
590 const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; in lowerCRBitSpilling()
599 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), Reg) in lowerCRBitSpilling()
608 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWINM8 : PPC::RLWINM), Reg) in lowerCRBitSpilling()
613 addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::STW8 : PPC::STW)) in lowerCRBitSpilling()
633 const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; in lowerCRBitRestore()
634 const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; in lowerCRBitRestore()
641 addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::LWZ8 : PPC::LWZ), in lowerCRBitRestore()
647 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), RegO) in lowerCRBitRestore()
652 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWIMI8 : PPC::RLWIMI), RegO) in lowerCRBitRestore()
659 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MTOCRF8 : PPC::MTOCRF), in lowerCRBitRestore()
682 const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; in lowerVRSAVESpilling()
686 BuildMI(MBB, II, dl, TII.get(PPC::MFVRSAVEv), Reg) in lowerVRSAVESpilling()
690 BuildMI(MBB, II, dl, TII.get(PPC::STW)).addReg(Reg, RegState::Kill), in lowerVRSAVESpilling()
708 const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; in lowerVRSAVERestore()
714 addFrameReference(BuildMI(MBB, II, dl, TII.get(PPC::LWZ), in lowerVRSAVERestore()
717 BuildMI(MBB, II, dl, TII.get(PPC::MTVRSAVEv), DestReg) in lowerVRSAVERestore()
732 if (Subtarget.isSVR4ABI() && PPC::CR2 <= Reg && Reg <= PPC::CR4) { in hasReservedSpillSlot()
752 case PPC::LWA: in usesIXAddr()
753 case PPC::LWA_32: in usesIXAddr()
754 case PPC::LD: in usesIXAddr()
755 case PPC::STD: in usesIXAddr()
805 if ((OpC == PPC::DYNAREAOFFSET || OpC == PPC::DYNAREAOFFSET8)) { in eliminateFrameIndex()
812 (OpC == PPC::DYNALLOC || OpC == PPC::DYNALLOC8)) { in eliminateFrameIndex()
818 if (OpC == PPC::SPILL_CR) { in eliminateFrameIndex()
821 } else if (OpC == PPC::RESTORE_CR) { in eliminateFrameIndex()
824 } else if (OpC == PPC::SPILL_CRBIT) { in eliminateFrameIndex()
827 } else if (OpC == PPC::RESTORE_CRBIT) { in eliminateFrameIndex()
830 } else if (OpC == PPC::SPILL_VRSAVE) { in eliminateFrameIndex()
833 } else if (OpC == PPC::RESTORE_VRSAVE) { in eliminateFrameIndex()
871 assert(OpC != PPC::DBG_VALUE && in eliminateFrameIndex()
884 const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; in eliminateFrameIndex()
885 const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; in eliminateFrameIndex()
891 BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::LIS8 : PPC::LIS), SRegHi) in eliminateFrameIndex()
893 BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::ORI8 : PPC::ORI), SReg) in eliminateFrameIndex()
924 return TFI->hasFP(MF) ? PPC::R31 : PPC::R1; in getFrameRegister()
926 return TFI->hasFP(MF) ? PPC::X31 : PPC::X1; in getFrameRegister()
935 return PPC::X30; in getBaseRegister()
938 return PPC::R29; in getBaseRegister()
940 return PPC::R30; in getBaseRegister()
977 if ((OpC == PPC::ADDI || OpC == PPC::ADDI8) && in needsFrameBaseReg()
1008 unsigned ADDriOpc = TM.isPPC64() ? PPC::ADDI8 : PPC::ADDI; in materializeFrameBaseRegister()
1063 return MI->getOpcode() == PPC::DBG_VALUE || // DBG_VALUE is always Reg+Imm in isFrameOffsetLegal()