Lines Matching refs:VZEXT
8106 InputV = DAG.getNode(X86ISD::VZEXT, DL, ExtVT, InputV); in lowerVectorShuffleAsSpecificZeroOrAnyExtend()
14006 return DAG.getNode(X86ISD::VZEXT, dl, VT, In); in LowerAVXExtend()
14034 return DAG.getNode(X86ISD::VZEXT, DL, VT, In); in LowerZERO_EXTEND_AVX512()
16031 if (In.getOpcode() == X86ISD::VSEXT || In.getOpcode() == X86ISD::VZEXT) in LowerSIGN_EXTEND_AVX512()
19468 unsigned ExSSE41 = (ISD::MULHU == Opcode ? X86ISD::VZEXT : X86ISD::VSEXT); in LowerMULH()
22174 case X86ISD::VZEXT: return "X86ISD::VZEXT"; in getTargetNodeName()
30846 if (V != Op && V.getOpcode() == X86ISD::VZEXT) { in combineVZext()
30854 return DAG.getNode(X86ISD::VZEXT, DL, VT, V.getOperand(0)); in combineVZext()
30865 return DAG.getNode(X86ISD::VZEXT, DL, VT, DAG.getBitcast(OpVT, V)); in combineVZext()
30887 return DAG.getNode(X86ISD::VZEXT, DL, VT, Op); in combineVZext()
30993 case X86ISD::VZEXT: return combineVZext(N, DAG, DCI, Subtarget); in PerformDAGCombine()