Lines Matching refs:FRC
123 RegisterClass FRC = !if (!eq (EltTypeName, "f32"), FR32X, FR64X);
803 (ins SrcInfo.FRC:$src), OpcodeStr#"\t{$src, $dst|$dst, $src}",
804 [(set DestInfo.RC:$dst, (DestInfo.VT (X86VBroadcast SrcInfo.FRC:$src)))]>,
809 (ins DestInfo.RC:$src0, DestInfo.KRCWM:$mask, SrcInfo.FRC:$src),
813 (DestInfo.VT (X86VBroadcast SrcInfo.FRC:$src)),
818 (ins DestInfo.KRCWM:$mask, SrcInfo.FRC:$src),
822 (DestInfo.VT (X86VBroadcast SrcInfo.FRC:$src)),
1406 (outs _.KRC:$dst), (ins _.FRC:$src1, _.FRC:$src2, AVXCC:$cc),
1409 [(set _.KRC:$dst, (OpNode _.FRC:$src1,
1410 _.FRC:$src2,
1415 (ins _.FRC:$src1, _.ScalarMemOp:$src2, AVXCC:$cc),
1418 [(set _.KRC:$dst, (OpNode _.FRC:$src1,
3009 (ins _.RC:$src1, _.FRC:$src2),
3012 (scalar_to_vector _.FRC:$src2))))],
3014 def rm : AVX512PI<0x10, MRMSrcMem, (outs _.FRC:$dst), (ins _.ScalarMemOp:$src),
3016 [(set _.FRC:$dst, (_.ScalarLdFrag addr:$src))],
3019 def mr: AVX512PI<0x11, MRMDestMem, (outs), (ins _.ScalarMemOp:$dst, _.FRC:$src),
3021 [(store _.FRC:$src, addr:$dst)], _.ExeDomain, IIC_SSE_MOV_S_MR>,
3025 (ins _.ScalarMemOp:$dst, VK1WM:$mask, _.FRC:$src),
3764 def rr : I< opc, MRMSrcReg, (outs _.FRC:$dst),
3765 (ins _.FRC:$src1, _.FRC:$src2),
3767 [(set _.FRC:$dst, (OpNode _.FRC:$src1, _.FRC:$src2))],
3769 def rm : I< opc, MRMSrcMem, (outs _.FRC:$dst),
3770 (ins _.FRC:$src1, _.ScalarMemOp:$src2),
3772 [(set _.FRC:$dst, (OpNode _.FRC:$src1,
3838 def rr : I< opc, MRMSrcReg, (outs _.FRC:$dst),
3839 (ins _.FRC:$src1, _.FRC:$src2),
3841 [(set _.FRC:$dst, (OpNode _.FRC:$src1, _.FRC:$src2))],
3843 def rm : I< opc, MRMSrcMem, (outs _.FRC:$dst),
3844 (ins _.FRC:$src1, _.ScalarMemOp:$src2),
3846 [(set _.FRC:$dst, (OpNode _.FRC:$src1,
4862 def r : AVX512FMA3<opc, MRMSrcReg, (outs _.FRC:$dst),
4863 (ins _.FRC:$src1, _.FRC:$src2, _.FRC:$src3),
4867 def m : AVX512FMA3<opc, MRMSrcMem, (outs _.FRC:$dst),
4868 (ins _.FRC:$src1, _.FRC:$src2, _.ScalarMemOp:$src3),
4886 (set _.FRC:$dst, (_.EltVT (OpNode _.FRC:$src2, _.FRC:$src1,
4887 _.FRC:$src3))),
4888 (set _.FRC:$dst, (_.EltVT (OpNode _.FRC:$src2, _.FRC:$src1,
4898 (set _.FRC:$dst, (_.EltVT (OpNode _.FRC:$src2, _.FRC:$src3,
4899 _.FRC:$src1))),
4900 (set _.FRC:$dst, (_.EltVT (OpNode _.FRC:$src2,
4901 (_.ScalarLdFrag addr:$src3), _.FRC:$src1)))>;
4910 (set _.FRC:$dst, (_.EltVT (OpNode _.FRC:$src1, _.FRC:$src3,
4911 _.FRC:$src2))),
4912 (set _.FRC:$dst, (_.EltVT (OpNode _.FRC:$src1,
4913 (_.ScalarLdFrag addr:$src3), _.FRC:$src2)))>;
4988 def rr : SI<opc, MRMSrcReg, (outs DstVT.FRC:$dst),
4989 (ins DstVT.FRC:$src1, SrcRC:$src),
4993 def rm : SI<opc, MRMSrcMem, (outs DstVT.FRC:$dst),
4994 (ins DstVT.FRC:$src1, x86memop:$src),
5187 def rr : SI<opc, MRMSrcReg, (outs _DstRC.RC:$dst), (ins _SrcRC.FRC:$src),
5189 [(set _DstRC.RC:$dst, (OpNode _SrcRC.FRC:$src))]>, EVEX;
5190 def rb : SI<opc, MRMSrcReg, (outs _DstRC.RC:$dst), (ins _SrcRC.FRC:$src),
6143 def r : I<opc, MRMSrcReg, (outs _.FRC:$dst),
6144 (ins _.FRC:$src1, _.FRC:$src2),
6148 def m : I<opc, MRMSrcMem, (outs _.FRC:$dst),
6149 (ins _.FRC:$src1, _.ScalarMemOp:$src2),
6153 def : Pat<(_.EltVT (OpNode _.FRC:$src)),
6155 (_.EltVT (IMPLICIT_DEF)), _.FRC:$src)>;
6212 def : Pat<(ffloor _.FRC:$src), (COPY_TO_REGCLASS
6214 (_.VT (COPY_TO_REGCLASS _.FRC:$src, _.RC)), (i32 0x1))), _.FRC)>;
6215 def : Pat<(fceil _.FRC:$src), (COPY_TO_REGCLASS
6217 (_.VT (COPY_TO_REGCLASS _.FRC:$src, _.RC)), (i32 0x2))), _.FRC)>;
6218 def : Pat<(ftrunc _.FRC:$src), (COPY_TO_REGCLASS
6220 (_.VT (COPY_TO_REGCLASS _.FRC:$src, _.RC)), (i32 0x3))), _.FRC)>;
6221 def : Pat<(frint _.FRC:$src), (COPY_TO_REGCLASS
6223 (_.VT (COPY_TO_REGCLASS _.FRC:$src, _.RC)), (i32 0x4))), _.FRC)>;
6224 def : Pat<(fnearbyint _.FRC:$src), (COPY_TO_REGCLASS
6226 (_.VT (COPY_TO_REGCLASS _.FRC:$src, _.RC)), (i32 0xc))), _.FRC)>;
6230 addr:$src, (i32 0x1))), _.FRC)>;
6233 addr:$src, (i32 0x2))), _.FRC)>;
6236 addr:$src, (i32 0x3))), _.FRC)>;
6239 addr:$src, (i32 0x4))), _.FRC)>;
6242 addr:$src, (i32 0xc))), _.FRC)>;
7141 defm rmi_alt :AVX512_maskable_in_asm<opc, MRMSrcMem, _, (outs _.FRC:$dst),
7142 (ins _.FRC:$src1, _.ScalarMemOp:$src2, u8imm:$src3),