Lines Matching refs:VEX
541 VEX, VEX_LIG, Sched<[WriteStore]>;
561 IIC_SSE_MOV_S_RM, d>, VEX, VEX_LIG, Sched<[WriteLoad]>;
760 // Aliases to help the assembler pick two byte VEX encodings by swapping the
761 // operands relative to the normal instructions to use VEX.R instead of VEX.B.
790 PS, VEX;
793 PD, VEX;
796 PS, VEX;
799 PD, VEX;
803 PS, VEX, VEX_L;
806 PD, VEX, VEX_L;
809 PS, VEX, VEX_L;
812 PD, VEX, VEX_L;
836 IIC_SSE_MOVA_P_MR>, VEX;
840 IIC_SSE_MOVA_P_MR>, VEX;
844 IIC_SSE_MOVU_P_MR>, VEX;
848 IIC_SSE_MOVU_P_MR>, VEX;
852 IIC_SSE_MOVA_P_MR>, VEX, VEX_L;
856 IIC_SSE_MOVA_P_MR>, VEX, VEX_L;
860 IIC_SSE_MOVU_P_MR>, VEX, VEX_L;
864 IIC_SSE_MOVU_P_MR>, VEX, VEX_L;
873 IIC_SSE_MOVA_P_RR>, VEX;
877 IIC_SSE_MOVA_P_RR>, VEX;
881 IIC_SSE_MOVU_P_RR>, VEX;
885 IIC_SSE_MOVU_P_RR>, VEX;
889 IIC_SSE_MOVA_P_RR>, VEX, VEX_L;
893 IIC_SSE_MOVA_P_RR>, VEX, VEX_L;
897 IIC_SSE_MOVU_P_RR>, VEX, VEX_L;
901 IIC_SSE_MOVU_P_RR>, VEX, VEX_L;
904 // Aliases to help the assembler pick two byte VEX encodings by swapping the
905 // operands relative to the normal instructions to use VEX.R instead of VEX.B.
1087 IIC_SSE_MOVA_P_RM>, VEX;
1091 IIC_SSE_MOVA_P_RM>, VEX;
1153 IIC_SSE_MOV_LH>, VEX;
1158 IIC_SSE_MOV_LH>, VEX;
1265 (iPTR 0))), addr:$dst)], IIC_SSE_MOV_LH>, VEX;
1270 (iPTR 0))), addr:$dst)], IIC_SSE_MOV_LH>, VEX;
1484 XS, VEX, VEX_LIG;
1488 XS, VEX, VEX_W, VEX_LIG;
1492 XD, VEX, VEX_LIG;
1496 XD, VEX, VEX_W, VEX_LIG;
1640 SSE_CVT_SD2SI>, XD, VEX, VEX_LIG;
1643 SSE_CVT_SD2SI>, XD, VEX, VEX_W, VEX_LIG;
1691 SSE_CVT_SS2SI_32>, XS, VEX;
1695 XS, VEX, VEX_W;
1698 SSE_CVT_SD2SI>, XD, VEX;
1702 XD, VEX, VEX_W;
1721 SSE_CVT_SS2SI_32>, XS, VEX, VEX_LIG;
1724 SSE_CVT_SS2SI_64>, XS, VEX, VEX_W, VEX_LIG;
1736 PS, VEX, Requires<[HasAVX]>;
1740 PS, VEX, VEX_L, Requires<[HasAVX]>;
1937 IIC_SSE_CVT_PS_RR>, VEX, Sched<[WriteCvtF2I]>;
1942 IIC_SSE_CVT_PS_RM>, VEX, Sched<[WriteCvtF2ILd]>;
1947 IIC_SSE_CVT_PS_RR>, VEX, VEX_L, Sched<[WriteCvtF2I]>;
1952 IIC_SSE_CVT_PS_RM>, VEX, VEX_L, Sched<[WriteCvtF2ILd]>;
1972 VEX, Sched<[WriteCvtF2I]>;
1980 (int_x86_sse2_cvtpd2dq (loadv2f64 addr:$src)))]>, VEX,
1987 (int_x86_avx_cvt_pd2dq_256 VR256:$src))]>, VEX, VEX_L,
1993 VEX, VEX_L, Sched<[WriteCvtF2ILd]>;
2012 [], IIC_SSE_CVT_PS_RR>, VEX, Sched<[WriteCvtF2I]>;
2015 [], IIC_SSE_CVT_PS_RM>, VEX, Sched<[WriteCvtF2ILd]>;
2018 [], IIC_SSE_CVT_PS_RR>, VEX, VEX_L, Sched<[WriteCvtF2I]>;
2021 [], IIC_SSE_CVT_PS_RM>, VEX, VEX_L,
2081 IIC_SSE_CVT_PD_RR>, VEX, Sched<[WriteCvtF2I]>;
2094 IIC_SSE_CVT_PD_RM>, VEX, Sched<[WriteCvtF2ILd]>;
2099 [], IIC_SSE_CVT_PD_RR>, VEX, VEX_L, Sched<[WriteCvtF2I]>;
2102 [], IIC_SSE_CVT_PD_RM>, VEX, VEX_L, Sched<[WriteCvtF2ILd]>;
2129 [], IIC_SSE_CVT_PD_RR>, PS, VEX, Sched<[WriteCvtF2F]>;
2133 IIC_SSE_CVT_PD_RM>, PS, VEX, Sched<[WriteCvtF2FLd]>;
2136 [], IIC_SSE_CVT_PD_RR>, PS, VEX, VEX_L, Sched<[WriteCvtF2F]>;
2139 [], IIC_SSE_CVT_PD_RM>, PS, VEX, VEX_L, Sched<[WriteCvtF2FLd]>;
2157 []>, VEX, Sched<[WriteCvtI2FLd]>;
2160 []>, VEX, Sched<[WriteCvtI2F]>;
2163 []>, VEX, VEX_L, Sched<[WriteCvtI2FLd]>;
2166 []>, VEX, VEX_L, Sched<[WriteCvtI2F]>;
2209 IIC_SSE_CVT_PD_RR>, VEX, Sched<[WriteCvtF2F]>;
2218 IIC_SSE_CVT_PD_RM>, VEX, Sched<[WriteCvtF2FLd]>;
2225 IIC_SSE_CVT_PD_RR>, VEX, VEX_L, Sched<[WriteCvtF2F]>;
2230 IIC_SSE_CVT_PD_RM>, VEX, VEX_L, Sched<[WriteCvtF2FLd]>;
2397 "ucomiss">, PS, VEX, VEX_LIG;
2399 "ucomisd">, PD, VEX, VEX_LIG;
2402 "comiss">, PS, VEX, VEX_LIG;
2404 "comisd">, PD, VEX, VEX_LIG;
2409 load, "ucomiss">, PS, VEX;
2411 load, "ucomisd">, PD, VEX;
2414 load, "comiss">, PS, VEX;
2416 load, "comisd">, PD, VEX;
2721 SSEPackedSingle>, PS, VEX;
2723 SSEPackedDouble>, PD, VEX;
2725 SSEPackedSingle>, PS, VEX, VEX_L;
2727 SSEPackedDouble>, PD, VEX, VEX_L;
3396 itins.rr>, VEX, Sched<[itins.Sched]>;
3401 itins.rm>, VEX, Sched<[itins.Sched.Folded]>;
3406 itins.rr>, VEX, VEX_L, Sched<[itins.Sched]>;
3411 itins.rm>, VEX, VEX_L, Sched<[itins.Sched.Folded]>;
3432 itins.rr>, VEX, Sched<[itins.Sched]>;
3437 itins.rm>, VEX, Sched<[itins.Sched.Folded]>;
3442 itins.rr>, VEX, VEX_L, Sched<[itins.Sched]>;
3447 itins.rm>, VEX, VEX_L, Sched<[itins.Sched.Folded]>;
3550 IIC_SSE_MOVNT>, VEX;
3556 IIC_SSE_MOVNT>, VEX;
3564 IIC_SSE_MOVNT>, VEX;
3571 IIC_SSE_MOVNT>, VEX, VEX_L;
3577 IIC_SSE_MOVNT>, VEX, VEX_L;
3584 IIC_SSE_MOVNT>, VEX, VEX_L;
3701 IIC_SSE_LDMXCSR>, VEX, Sched<[WriteLoad]>;
3704 IIC_SSE_STMXCSR>, VEX, Sched<[WriteStore]>;
3724 VEX;
3727 VEX, VEX_L;
3730 VEX;
3733 VEX, VEX_L;
3742 VEX;
3745 IIC_SSE_MOVA_P_RR>, VEX, VEX_L;
3749 VEX;
3752 IIC_SSE_MOVU_P_RR>, VEX, VEX_L;
3759 VEX;
3762 VEX, VEX_L;
3766 XS, VEX;
3769 XS, VEX, VEX_L;
3777 VEX;
3781 VEX, VEX_L;
3785 XS, VEX;
3788 XS, VEX, VEX_L;
3840 // Aliases to help the assembler pick two byte VEX encodings by swapping the
3841 // operands relative to the normal instructions to use VEX.R instead of VEX.B.
4220 IIC_SSE_PSHUF_RI>, VEX, Sched<[WriteShuffle]>;
4227 (i8 imm:$src2))))], IIC_SSE_PSHUF_MI>, VEX,
4238 IIC_SSE_PSHUF_RI>, VEX, VEX_L, Sched<[WriteShuffle]>;
4245 (i8 imm:$src2))))], IIC_SSE_PSHUF_MI>, VEX, VEX_L,
4555 imm:$src2))]>, PD, VEX,
4583 IIC_SSE_MOVMSK>, VEX;
4590 VEX, VEX_L;
4611 IIC_SSE_MASKMOV>, VEX;
4617 IIC_SSE_MASKMOV>, VEX;
4643 VEX, Sched<[WriteMove]>;
4649 VEX, Sched<[WriteLoad]>;
4654 IIC_SSE_MOVDQ>, VEX, Sched<[WriteMove]>;
4658 [], IIC_SSE_MOVDQ>, VEX, Sched<[WriteLoad]>;
4663 IIC_SSE_MOVDQ>, VEX, Sched<[WriteMove]>;
4697 IIC_SSE_MOVDQ>, VEX, Sched<[WriteMove]>;
4703 VEX, Sched<[WriteLoad]>;
4721 (iPTR 0)))], IIC_SSE_MOVD_ToGP>, VEX,
4728 VEX, Sched<[WriteStore]>;
4761 VEX;
4774 [], IIC_SSE_MOVDQ>, VEX, Sched<[WriteStore]>;
4788 VEX, Sched<[WriteLoad]>;
4792 IIC_SSE_MOVDQ>, VEX, Sched<[WriteMove]>;
4796 IIC_SSE_MOVDQ>, VEX, Sched<[WriteStore]>;
4819 IIC_SSE_MOVD_ToGP>, VEX, Sched<[WriteMove]>;
4823 IIC_SSE_MOVDQ>, VEX, Sched<[WriteStore]>;
4909 VEX, Requires<[UseAVX]>;
4926 IIC_SSE_MOVDQ>, VEX;
4938 "movq\t{$src, $dst|$dst, $src}", [], IIC_SSE_MOVQ_RR>, VEX;
4943 // Aliases to help the assembler pick two byte VEX encodings by swapping the
4944 // operands relative to the normal instructions to use VEX.R instead of VEX.B.
4958 XS, VEX, Requires<[UseAVX]>, Sched<[WriteLoad]>;
4997 XS, VEX, Requires<[UseAVX]>;
5013 XS, VEX, Requires<[UseAVX]>;
5053 v4f32, VR128, loadv4f32, f128mem>, VEX;
5055 v4f32, VR128, loadv4f32, f128mem>, VEX;
5057 v8f32, VR256, loadv8f32, f256mem>, VEX, VEX_L;
5059 v8f32, VR256, loadv8f32, f256mem>, VEX, VEX_L;
5127 defm VMOVDDUP : sse3_replicate_dfp<"vmovddup">, VEX;
5128 defm VMOVDDUPY : sse3_replicate_dfp_y<"vmovddup">, VEX, VEX_L;
5182 [(set VR128:$dst, (int_x86_sse3_ldu_dq addr:$src))]>, VEX;
5186 VEX, VEX_L;
5400 defm VPABSB : SS3I_unop_rm<0x1C, "vpabsb", v16i8, X86Abs, loadv2i64>, VEX;
5401 defm VPABSW : SS3I_unop_rm<0x1D, "vpabsw", v8i16, X86Abs, loadv2i64>, VEX;
5404 defm VPABSD : SS3I_unop_rm<0x1E, "vpabsd", v4i32, X86Abs, loadv2i64>, VEX;
5423 defm VPABSB : SS3I_unop_rm_y<0x1C, "vpabsb", v32i8, X86Abs>, VEX, VEX_L;
5424 defm VPABSW : SS3I_unop_rm_y<0x1D, "vpabsw", v16i16, X86Abs>, VEX, VEX_L;
5427 defm VPABSD : SS3I_unop_rm_y<0x1E, "vpabsd", v8i32, X86Abs>, VEX, VEX_L;
5803 VR128, VR128, AVXItins>, VEX;
5806 VR256, VR128, AVX2Itins>, VEX, VEX_L;
6072 defm VPEXTRB : SS41I_extract8<0x14, "vpextrb">, VEX;
6097 defm VPEXTRW : SS41I_extract16<0x15, "vpextrw">, VEX;
6121 defm VPEXTRD : SS41I_extract32<0x16, "vpextrd">, VEX;
6144 defm VPEXTRQ : SS41I_extract64<0x16, "vpextrq">, VEX, VEX_W;
6170 defm VEXTRACTPS : SS41I_extractf32<0x17, "vextractps">, VEX;
6457 int_x86_sse41_round_pd>, VEX;
6461 int_x86_avx_round_pd_256>, VEX, VEX_L;
6598 Sched<[WriteVecLogic]>, VEX;
6602 Sched<[WriteVecLogicLd, ReadAfterLd]>, VEX;
6607 Sched<[WriteVecLogic]>, VEX, VEX_L;
6611 Sched<[WriteVecLogicLd, ReadAfterLd]>, VEX, VEX_L;
6631 Sched<[WriteVecLogic]>, VEX;
6635 Sched<[WriteVecLogicLd, ReadAfterLd]>, VEX;
6714 WriteVecIMul>, VEX;
7233 VEX;
7238 VEX, VEX_L;
7345 defm VPCMPISTRM128 : pcmpistrm_SS42AI<"vpcmpistrm">, VEX;
7382 defm VPCMPESTRM128 : SS42AI_pcmpestrm<"vpcmpestrm">, VEX;
7419 defm VPCMPISTRI : SS42AI_pcmpistri<"vpcmpistri">, VEX;
7457 defm VPCMPESTRI : SS42AI_pcmpestri<"vpcmpestri">, VEX;
7618 VEX;
7623 Sched<[WriteAESIMCLd]>, VEX;
7643 Sched<[WriteAESKeyGen]>, VEX;
7649 Sched<[WriteAESKeyGenLd]>, VEX;
7789 Sched<[Sched]>, VEX;
7797 Sched<[Sched]>, VEX;
7824 Sched<[WriteLoad]>, VEX, VEX_L;
7831 Sched<[WriteFShuffleLd]>, VEX, VEX_L;
7919 []>, Sched<[WriteFShuffle]>, VEX, VEX_L;
7924 []>, Sched<[WriteStore]>, VEX, VEX_L;
8046 [(set RC:$dst, (f_vt (X86VPermilpi RC:$src1, (i8 imm:$src2))))]>, VEX,
8052 (f_vt (X86VPermilpi (load addr:$src1), (i8 imm:$src2))))]>, VEX,
8163 [(int_x86_avx_vzeroall)]>, PS, VEX, VEX_L, Requires<[HasAVX]>;
8167 [(int_x86_avx_vzeroupper)]>, PS, VEX, Requires<[HasAVX]>;
8177 T8PD, VEX, Sched<[WriteCvtF2F]>;
8180 "vcvtph2ps\t{$src, $dst|$dst, $src}", []>, T8PD, VEX,
8189 TAPD, VEX, Sched<[WriteCvtF2F]>;
8195 TAPD, VEX;
8288 Sched<[WriteShuffle]>, VEX;
8293 Sched<[WriteLoad]>, VEX;
8298 Sched<[WriteShuffle256]>, VEX, VEX_L;
8303 Sched<[WriteLoad]>, VEX, VEX_L;
8477 Sched<[Sched]>, VEX, VEX_L;
8485 Sched<[Sched.Folded, ReadAfterLd]>, VEX, VEX_L;
8592 Sched<[WriteShuffle256]>, VEX, VEX_L;
8597 Sched<[WriteStore]>, VEX, VEX_L;