Lines Matching refs:VEX_LIG
536 VEX_4V, VEX_LIG;
541 VEX, VEX_LIG, Sched<[WriteStore]>;
561 IIC_SSE_MOV_S_RM, d>, VEX, VEX_LIG, Sched<[WriteLoad]>;
1484 XS, VEX, VEX_LIG;
1488 XS, VEX, VEX_W, VEX_LIG;
1492 XD, VEX, VEX_LIG;
1496 XD, VEX, VEX_W, VEX_LIG;
1520 XS, VEX_4V, VEX_LIG;
1522 XS, VEX_4V, VEX_W, VEX_LIG;
1524 XD, VEX_4V, VEX_LIG;
1526 XD, VEX_4V, VEX_W, VEX_LIG;
1640 SSE_CVT_SD2SI>, XD, VEX, VEX_LIG;
1643 SSE_CVT_SD2SI>, XD, VEX, VEX_W, VEX_LIG;
1721 SSE_CVT_SS2SI_32>, XS, VEX, VEX_LIG;
1724 SSE_CVT_SS2SI_64>, XS, VEX, VEX_W, VEX_LIG;
1790 IIC_SSE_CVT_Scalar_RR>, VEX_4V, VEX_LIG,
1797 XD, Requires<[HasAVX, OptForSize]>, VEX_4V, VEX_LIG,
1856 XS, Requires<[HasAVX]>, VEX_4V, VEX_LIG,
1863 XS, VEX_4V, VEX_LIG, Requires<[HasAVX, OptForSize]>,
2321 SSE_ALU_F32S, i8immZExt5>, XS, VEX_4V, VEX_LIG;
2326 XD, VEX_4V, VEX_LIG;
2397 "ucomiss">, PS, VEX, VEX_LIG;
2399 "ucomisd">, PD, VEX, VEX_LIG;
2402 "comiss">, PS, VEX, VEX_LIG;
2404 "comisd">, PD, VEX, VEX_LIG;
2997 XS, VEX_4V, VEX_LIG;
3000 XD, VEX_4V, VEX_LIG;
3016 SSEPackedSingle, itins.s, 0>, XS, VEX_4V, VEX_LIG;
3019 SSEPackedDouble, itins.d, 0>, XD, VEX_4V, VEX_LIG;
3469 SSEPackedSingle, itins, "SS">, XS, VEX_4V, VEX_LIG;
3482 XD, VEX_4V, VEX_LIG;
6464 int_x86_sse41_round_sd, 0>, VEX_4V, VEX_LIG;