Lines Matching refs:seq_cst

95 ; CHECK-NEXT: %res4 = load atomic i8, i8* %ptr1 seq_cst, align 1
96   %res4 = load atomic i8, i8* %ptr1 seq_cst, align 1
107 ; CHECK-NEXT: %res8 = load atomic volatile i8, i8* %ptr1 seq_cst, align 1
108   %res8 = load atomic volatile i8, i8* %ptr1 seq_cst, align 1
119 ; CHECK-NEXT: %res12 = load atomic i8, i8* %ptr1 singlethread seq_cst, align 1
120   %res12 = load atomic i8, i8* %ptr1 singlethread seq_cst, align 1
131 ; CHECK-NEXT: %res16 = load atomic volatile i8, i8* %ptr1 singlethread seq_cst, align 1
132   %res16 = load atomic volatile i8, i8* %ptr1 singlethread seq_cst, align 1
181 ; CHECK-NEXT: store atomic i8 2, i8* %ptr1 seq_cst, align 1
182   store atomic i8 2, i8* %ptr1 seq_cst, align 1
193 ; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 seq_cst, align 1
194   store atomic volatile i8 2, i8* %ptr1 seq_cst, align 1
205 ; CHECK-NEXT: store atomic i8 2, i8* %ptr1 singlethread seq_cst, align 1
206   store atomic i8 2, i8* %ptr1 singlethread seq_cst, align 1
217 ; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 singlethread seq_cst, align 1
218   store atomic volatile i8 2, i8* %ptr1 singlethread seq_cst, align 1
295 ; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
297   %res17 = cmpxchg i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
299 ; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
301   %res18 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
303 …CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread seq_cst seq_cst
305   %res19 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread seq_cst seq_cst
307 …T: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread seq_cst seq_cst
309   %res20 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread seq_cst seq_cst