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Lines Matching refs:interleaved

1 ; RUN: llc -mtriple=arm-eabi -mattr=+neon -lower-interleaved-accesses=true < %s | FileCheck %s -che…
2 ; RUN: llc -mtriple=arm-eabi -mattr=-neon -lower-interleaved-accesses=true < %s | FileCheck %s -che…
48 …%interleaved.vec = shufflevector <8 x i8> %v0, <8 x i8> %v1, <16 x i32> <i32 0, i32 8, i32 1, i32 …
49 store <16 x i8> %interleaved.vec, <16 x i8>* %ptr, align 4
62 …%interleaved.vec = shufflevector <8 x i32> %v0_v1, <8 x i32> %v2_u, <12 x i32> <i32 0, i32 4, i32 …
63 store <12 x i32> %interleaved.vec, <12 x i32>* %base, align 4
76 …%interleaved.vec = shufflevector <8 x i32> %v0_v1, <8 x i32> %v2_v3, <16 x i32> <i32 0, i32 4, i32…
77 store <16 x i32> %interleaved.vec, <16 x i32>* %base, align 4
81 ; The following cases test that interleaved access of pointer vectors can be
129 …%interleaved.vec = shufflevector <2 x i32*> %v0, <2 x i32*> %v1, <4 x i32> <i32 0, i32 2, i32 1, i…
130 store <4 x i32*> %interleaved.vec, <4 x i32*>* %base, align 4
142 …%interleaved.vec = shufflevector <4 x i32*> %v0_v1, <4 x i32*> %v2_u, <6 x i32> <i32 0, i32 2, i32…
143 store <6 x i32*> %interleaved.vec, <6 x i32*>* %base, align 4
155 …%interleaved.vec = shufflevector <4 x i32*> %v0_v1, <4 x i32*> %v2_v3, <8 x i32> <i32 0, i32 2, i3…
156 store <8 x i32*> %interleaved.vec, <8 x i32*>* %base, align 4
210 …%interleaved.vec = shufflevector <4 x i32> %v0, <4 x i32> %v1, <8 x i32> <i32 undef, i32 undef, i3…
211 store <8 x i32> %interleaved.vec, <8 x i32>* %base, align 4
224 …%interleaved.vec = shufflevector <8 x i32> %v0_v1, <8 x i32> %v2_u, <12 x i32> <i32 0, i32 4, i32 …
225 store <12 x i32> %interleaved.vec, <12 x i32>* %base, align 4
238 …%interleaved.vec = shufflevector <8 x i32> %v0_v1, <8 x i32> %v2_v3, <16 x i32> <i32 0, i32 4, i32…
239 store <16 x i32> %interleaved.vec, <16 x i32>* %base, align 4
251 %interleaved = shufflevector <4 x i32> %tmp, <4 x i32> undef, <2 x i32> <i32 0, i32 3>
252 store <2 x i32> %interleaved, <2 x i32>* %B
263 …%interleaved = shufflevector <2 x i32> %tmp0, <2 x i32> %tmp1, <4 x i32> <i32 0, i32 2, i32 1, i32…
264 store <4 x i32> %interleaved, <4 x i32> addrspace(1)* %C