Lines Matching refs:REG

7 ; SOFT: vadd.f64 [[REG:d[0-9]+]]
8 ; SOFT: vmov r1, r0, [[REG]]
23 ; SOFT: vadd.i64 [[REG:d[0-9]+]]
24 ; SOFT: vmov r1, r0, [[REG]]
39 ; SOFT: vrev64.32 [[REG:d[0-9]+]]
40 ; SOFT: vmov r1, r0, [[REG]]
55 ; SOFT: vrev64.32 [[REG:d[0-9]+]]
56 ; SOFT: vmov r1, r0, [[REG]]
71 ; SOFT: vrev64.16 [[REG:d[0-9]+]]
72 ; SOFT: vmov r1, r0, [[REG]]
87 ; SOFT: vrev64.8 [[REG:d[0-9]+]]
88 ; SOFT: vmov r1, r0, [[REG]]
111 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
112 ; SOFT: vadd.f64 [[REG]]
119 ; SOFT: vadd.i64 [[REG:d[0-9]+]]
120 ; SOFT: vmov r1, r0, [[REG]]
128 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
129 ; SOFT: vadd.f64 [[REG]]
136 ; SOFT: vrev64.32 [[REG:d[0-9]+]]
137 ; SOFT: vmov r1, r0, [[REG]]
145 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
146 ; SOFT: vadd.f64 [[REG]]
153 ; SOFT: vrev64.32 [[REG:d[0-9]+]]
154 ; SOFT: vmov r1, r0, [[REG]]
162 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
163 ; SOFT: vadd.f64 [[REG]]
170 ; SOFT: vrev64.16 [[REG:d[0-9]+]]
171 ; SOFT: vmov r1, r0, [[REG]]
179 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
180 ; SOFT: vadd.f64 [[REG]]
187 ; SOFT: vrev64.8 [[REG:d[0-9]+]]
188 ; SOFT: vmov r1, r0, [[REG]]
196 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
197 ; SOFT: vadd.f64 [[REG]]
212 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
213 ; SOFT: vadd.i64 [[REG]]
220 ; SOFT: vadd.f64 [[REG:d[0-9]+]]
221 ; SOFT: vmov r1, r0, [[REG]]
229 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
230 ; SOFT: vadd.i64 [[REG]]
238 ; SOFT: vadd.f32 [[REG:d[0-9]+]]
239 ; SOFT: vmov r1, r0, [[REG]]
246 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
247 ; SOFT: vadd.i64 [[REG]]
255 ; SOFT: vadd.i32 [[REG:d[0-9]+]]
256 ; SOFT: vrev64.32 [[REG]]
257 ; SOFT: vmov r1, r0, [[REG]]
264 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
265 ; SOFT: vadd.i64 [[REG]]
272 ; SOFT: vrev64.16 [[REG:d[0-9]+]]
273 ; SOFT: vmov r1, r0, [[REG]]
281 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
282 ; SOFT: vadd.i64 [[REG]]
289 ; SOFT: vrev64.8 [[REG:d[0-9]+]]
290 ; SOFT: vmov r1, r0, [[REG]]
298 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
299 ; SOFT: vadd.i64 [[REG]]
314 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
315 ; SOFT: vrev64.32 [[REG]]
322 ; SOFT: vadd.f64 [[REG:d[0-9]+]]
323 ; SOFT: vmov r1, r0, [[REG]]
331 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
332 ; SOFT: vrev64.32 [[REG]]
339 ; SOFT: vadd.i64 [[REG:d[0-9]+]]
340 ; SOFT: vmov r1, r0, [[REG]]
348 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
349 ; SOFT: vrev64.32 [[REG]]
357 ; SOFT: vadd.i32 [[REG:d[0-9]+]]
358 ; SOFT: vrev64.32 [[REG]]
359 ; SOFT: vmov r1, r0, [[REG]]
366 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
367 ; SOFT: vrev64.32 [[REG]]
374 ; SOFT: vrev64.16 [[REG:d[0-9]+]]
375 ; SOFT: vmov r1, r0, [[REG]]
383 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
384 ; SOFT: vrev64.32 [[REG]]
391 ; SOFT: vrev64.8 [[REG:d[0-9]+]]
392 ; SOFT: vmov r1, r0, [[REG]]
400 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
401 ; SOFT: vrev64.32 [[REG]]
416 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
417 ; SOFT: vrev64.32 [[REG]]
424 ; SOFT: vadd.f64 [[REG:d[0-9]+]]
425 ; SOFT: vmov r1, r0, [[REG]]
433 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
434 ; SOFT: vrev64.32 [[REG]]
441 ; SOFT: vadd.i64 [[REG:d[0-9]+]]
442 ; SOFT: vmov r1, r0, [[REG]]
450 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
451 ; SOFT: vrev64.32 [[REG]]
458 ; HARD: vadd.f32 [[REG:d[0-9]+]]
459 ; HARD: vrev64.32 d0, [[REG]]
460 ; SOFT: vadd.f32 [[REG:d[0-9]+]]
461 ; SOFT: vrev64.32 [[REG]]
462 ; SOFT: vmov r1, r0, [[REG]]
469 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
470 ; SOFT: vrev64.32 [[REG]]
477 ; SOFT: vrev64.16 [[REG:d[0-9]+]]
478 ; SOFT: vmov r1, r0, [[REG]]
486 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
487 ; SOFT: vrev64.32 [[REG]]
494 ; SOFT: vrev64.8 [[REG:d[0-9]+]]
495 ; SOFT: vmov r1, r0, [[REG]]
503 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
504 ; SOFT: vrev64.32 [[REG]]
519 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
520 ; SOFT: vrev64.16 [[REG]]
527 ; SOFT: vadd.f64 [[REG:d[0-9]+]]
528 ; SOFT: vmov r1, r0, [[REG]]
536 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
537 ; SOFT: vrev64.16 [[REG]]
544 ; SOFT: vadd.i64 [[REG:d[0-9]+]]
545 ; SOFT: vmov r1, r0, [[REG]]
553 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
554 ; SOFT: vrev64.16 [[REG]]
561 ; HARD: vadd.f32 [[REG:d[0-9]+]]
562 ; HARD: vrev64.32 d0, [[REG]]
563 ; SOFT: vadd.f32 [[REG:d[0-9]+]]
564 ; SOFT: vrev64.32 [[REG]]
565 ; SOFT: vmov r1, r0, [[REG]]
572 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
573 ; SOFT: vrev64.16 [[REG]]
580 ; HARD: vadd.i32 [[REG:d[0-9]+]]
581 ; HARD: vrev64.32 d0, [[REG]]
582 ; SOFT: vadd.i32 [[REG:d[0-9]+]]
583 ; SOFT: vrev64.32 [[REG]]
584 ; SOFT: vmov r1, r0, [[REG]]
591 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
592 ; SOFT: vrev64.16 [[REG]]
599 ; SOFT: vrev64.8 [[REG:d[0-9]+]]
600 ; SOFT: vmov r1, r0, [[REG]]
608 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
609 ; SOFT: vrev64.16 [[REG]]
624 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
625 ; SOFT: vrev64.8 [[REG]]
632 ; SOFT: vadd.f64 [[REG:d[0-9]+]]
633 ; SOFT: vmov r1, r0, [[REG]]
641 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
642 ; SOFT: vrev64.8 [[REG]]
649 ; SOFT: vadd.i64 [[REG:d[0-9]+]]
650 ; SOFT: vmov r1, r0, [[REG]]
658 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
659 ; SOFT: vrev64.8 [[REG]]
666 ; SOFT: vrev64.32 [[REG:d[0-9]+]]
667 ; SOFT: vmov r1, r0, [[REG]]
675 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
676 ; SOFT: vrev64.8 [[REG]]
683 ; SOFT: vrev64.32 [[REG:d[0-9]+]]
684 ; SOFT: vmov r1, r0, [[REG]]
692 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
693 ; SOFT: vrev64.8 [[REG]]
700 ; SOFT: vrev64.16 [[REG:d[0-9]+]]
701 ; SOFT: vmov r1, r0, [[REG]]
709 ; SOFT: vmov [[REG:d[0-9]+]], r1, r0
710 ; SOFT: vrev64.8 [[REG]]