Lines Matching refs:coerce
112 define i64 @test__builtin_mips_dpau_h_qbl1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) n…
116 %1 = bitcast i32 %a1.coerce to <4 x i8>
117 %2 = bitcast i32 %a2.coerce to <4 x i8>
124 define i64 @test__builtin_mips_dpau_h_qbr1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) n…
128 %1 = bitcast i32 %a1.coerce to <4 x i8>
129 %2 = bitcast i32 %a2.coerce to <4 x i8>
136 define i64 @test__builtin_mips_dpsu_h_qbl1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) n…
140 %1 = bitcast i32 %a1.coerce to <4 x i8>
141 %2 = bitcast i32 %a2.coerce to <4 x i8>
148 define i64 @test__builtin_mips_dpsu_h_qbr1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) n…
152 %1 = bitcast i32 %a1.coerce to <4 x i8>
153 %2 = bitcast i32 %a2.coerce to <4 x i8>
160 define i64 @test__builtin_mips_dpaq_s_w_ph1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) …
164 %1 = bitcast i32 %a1.coerce to <2 x i16>
165 %2 = bitcast i32 %a2.coerce to <2 x i16>
182 define i64 @test__builtin_mips_dpsq_s_w_ph1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) …
186 %1 = bitcast i32 %a1.coerce to <2 x i16>
187 %2 = bitcast i32 %a2.coerce to <2 x i16>
204 define i64 @test__builtin_mips_mulsaq_s_w_ph1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce…
208 %1 = bitcast i32 %a1.coerce to <2 x i16>
209 %2 = bitcast i32 %a2.coerce to <2 x i16>
216 define i64 @test__builtin_mips_maq_s_w_phl1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) …
220 %1 = bitcast i32 %a1.coerce to <2 x i16>
221 %2 = bitcast i32 %a2.coerce to <2 x i16>
228 define i64 @test__builtin_mips_maq_s_w_phr1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) …
232 %1 = bitcast i32 %a1.coerce to <2 x i16>
233 %2 = bitcast i32 %a2.coerce to <2 x i16>
240 define i64 @test__builtin_mips_maq_sa_w_phl1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce)…
244 %1 = bitcast i32 %a1.coerce to <2 x i16>
245 %2 = bitcast i32 %a2.coerce to <2 x i16>
252 define i64 @test__builtin_mips_maq_sa_w_phr1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce)…
256 %1 = bitcast i32 %a1.coerce to <2 x i16>
257 %2 = bitcast i32 %a2.coerce to <2 x i16>
362 define { i32 } @test__builtin_mips_addq_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
366 %0 = bitcast i32 %a0.coerce to <2 x i16>
367 %1 = bitcast i32 %a1.coerce to <2 x i16>
376 define { i32 } @test__builtin_mips_addq_s_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
380 %0 = bitcast i32 %a0.coerce to <2 x i16>
381 %1 = bitcast i32 %a1.coerce to <2 x i16>
400 define { i32 } @test__builtin_mips_addu_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
404 %0 = bitcast i32 %a0.coerce to <4 x i8>
405 %1 = bitcast i32 %a1.coerce to <4 x i8>
414 define { i32 } @test__builtin_mips_addu_s_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
418 %0 = bitcast i32 %a0.coerce to <4 x i8>
419 %1 = bitcast i32 %a1.coerce to <4 x i8>
428 define { i32 } @test__builtin_mips_subq_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
432 %0 = bitcast i32 %a0.coerce to <2 x i16>
433 %1 = bitcast i32 %a1.coerce to <2 x i16>
442 define { i32 } @test__builtin_mips_subq_s_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
446 %0 = bitcast i32 %a0.coerce to <2 x i16>
447 %1 = bitcast i32 %a1.coerce to <2 x i16>
466 define { i32 } @test__builtin_mips_subu_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
470 %0 = bitcast i32 %a0.coerce to <4 x i8>
471 %1 = bitcast i32 %a1.coerce to <4 x i8>
480 define { i32 } @test__builtin_mips_subu_s_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
484 %0 = bitcast i32 %a0.coerce to <4 x i8>
485 %1 = bitcast i32 %a1.coerce to <4 x i8>
524 define i32 @test__builtin_mips_raddu_w_qb1(i32 %i0, i32 %a0.coerce) nounwind readnone {
528 %0 = bitcast i32 %a0.coerce to <4 x i8>
535 define { i32 } @test__builtin_mips_muleu_s_ph_qbl1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwin…
539 %0 = bitcast i32 %a0.coerce to <4 x i8>
540 %1 = bitcast i32 %a1.coerce to <2 x i16>
549 define { i32 } @test__builtin_mips_muleu_s_ph_qbr1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwin…
553 %0 = bitcast i32 %a0.coerce to <4 x i8>
554 %1 = bitcast i32 %a1.coerce to <2 x i16>
563 define { i32 } @test__builtin_mips_mulq_rs_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
567 %0 = bitcast i32 %a0.coerce to <2 x i16>
568 %1 = bitcast i32 %a1.coerce to <2 x i16>
577 define i32 @test__builtin_mips_muleq_s_w_phl1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
581 %0 = bitcast i32 %a0.coerce to <2 x i16>
582 %1 = bitcast i32 %a1.coerce to <2 x i16>
589 define i32 @test__builtin_mips_muleq_s_w_phr1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
593 %0 = bitcast i32 %a0.coerce to <2 x i16>
594 %1 = bitcast i32 %a1.coerce to <2 x i16>
601 define { i32 } @test__builtin_mips_precrq_qb_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind …
605 %0 = bitcast i32 %a0.coerce to <2 x i16>
606 %1 = bitcast i32 %a1.coerce to <2 x i16>
639 define { i32 } @test__builtin_mips_precrqu_s_qb_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwi…
643 %0 = bitcast i32 %a0.coerce to <2 x i16>
644 %1 = bitcast i32 %a1.coerce to <2 x i16>
654 define i32 @test__builtin_mips_cmpu_eq_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
658 %0 = bitcast i32 %a0.coerce to <4 x i8>
659 %1 = bitcast i32 %a1.coerce to <4 x i8>
669 define i32 @test__builtin_mips_cmpu_lt_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
673 %0 = bitcast i32 %a0.coerce to <4 x i8>
674 %1 = bitcast i32 %a1.coerce to <4 x i8>
682 define i32 @test__builtin_mips_cmpu_le_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
686 %0 = bitcast i32 %a0.coerce to <4 x i8>
687 %1 = bitcast i32 %a1.coerce to <4 x i8>
695 define i32 @test__builtin_mips_cmpgu_eq_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
699 %0 = bitcast i32 %a0.coerce to <4 x i8>
700 %1 = bitcast i32 %a1.coerce to <4 x i8>
707 define i32 @test__builtin_mips_cmpgu_lt_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
711 %0 = bitcast i32 %a0.coerce to <4 x i8>
712 %1 = bitcast i32 %a1.coerce to <4 x i8>
719 define i32 @test__builtin_mips_cmpgu_le_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
723 %0 = bitcast i32 %a0.coerce to <4 x i8>
724 %1 = bitcast i32 %a1.coerce to <4 x i8>
731 define i32 @test__builtin_mips_cmp_eq_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
735 %0 = bitcast i32 %a0.coerce to <2 x i16>
736 %1 = bitcast i32 %a1.coerce to <2 x i16>
744 define i32 @test__builtin_mips_cmp_lt_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
748 %0 = bitcast i32 %a0.coerce to <2 x i16>
749 %1 = bitcast i32 %a1.coerce to <2 x i16>
757 define i32 @test__builtin_mips_cmp_le_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
761 %0 = bitcast i32 %a0.coerce to <2 x i16>
762 %1 = bitcast i32 %a1.coerce to <2 x i16>
770 define { i32 } @test__builtin_mips_pick_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind reado…
774 %0 = bitcast i32 %a0.coerce to <4 x i8>
775 %1 = bitcast i32 %a1.coerce to <4 x i8>
785 define { i32 } @test__builtin_mips_pick_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind reado…
789 %0 = bitcast i32 %a0.coerce to <2 x i16>
790 %1 = bitcast i32 %a1.coerce to <2 x i16>
800 define { i32 } @test__builtin_mips_packrl_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind rea…
804 %0 = bitcast i32 %a0.coerce to <2 x i16>
805 %1 = bitcast i32 %a1.coerce to <2 x i16>
814 define { i32 } @test__builtin_mips_shll_qb1(i32 %i0, i32 %a0.coerce) nounwind {
818 %0 = bitcast i32 %a0.coerce to <4 x i8>
827 define { i32 } @test__builtin_mips_shll_qb2(i32 %i0, i32 %a0.coerce, i32 %a1) nounwind {
831 %0 = bitcast i32 %a0.coerce to <4 x i8>
838 define { i32 } @test__builtin_mips_shll_ph1(i32 %i0, i32 %a0.coerce) nounwind {
842 %0 = bitcast i32 %a0.coerce to <2 x i16>
851 define { i32 } @test__builtin_mips_shll_ph2(i32 %i0, i32 %a0.coerce, i32 %a1) nounwind {
855 %0 = bitcast i32 %a0.coerce to <2 x i16>
862 define { i32 } @test__builtin_mips_shll_s_ph1(i32 %i0, i32 %a0.coerce) nounwind {
866 %0 = bitcast i32 %a0.coerce to <2 x i16>
875 define { i32 } @test__builtin_mips_shll_s_ph2(i32 %i0, i32 %a0.coerce, i32 %a1) nounwind {
879 %0 = bitcast i32 %a0.coerce to <2 x i16>
904 define { i32 } @test__builtin_mips_shrl_qb1(i32 %i0, i32 %a0.coerce) nounwind readnone {
908 %0 = bitcast i32 %a0.coerce to <4 x i8>
917 define { i32 } @test__builtin_mips_shrl_qb2(i32 %i0, i32 %a0.coerce, i32 %a1) nounwind readnone {
921 %0 = bitcast i32 %a0.coerce to <4 x i8>
928 define { i32 } @test__builtin_mips_shra_ph1(i32 %i0, i32 %a0.coerce) nounwind readnone {
932 %0 = bitcast i32 %a0.coerce to <2 x i16>
941 define { i32 } @test__builtin_mips_shra_ph2(i32 %i0, i32 %a0.coerce, i32 %a1) nounwind readnone {
945 %0 = bitcast i32 %a0.coerce to <2 x i16>
952 define { i32 } @test__builtin_mips_shra_r_ph1(i32 %i0, i32 %a0.coerce) nounwind readnone {
956 %0 = bitcast i32 %a0.coerce to <2 x i16>
965 define { i32 } @test__builtin_mips_shra_r_ph2(i32 %i0, i32 %a0.coerce, i32 %a1) nounwind readnone {
969 %0 = bitcast i32 %a0.coerce to <2 x i16>
994 define { i32 } @test__builtin_mips_absq_s_ph1(i32 %i0, i32 %a0.coerce) nounwind {
998 %0 = bitcast i32 %a0.coerce to <2 x i16>
1017 define i32 @test__builtin_mips_preceq_w_phl1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1021 %0 = bitcast i32 %a0.coerce to <2 x i16>
1028 define i32 @test__builtin_mips_preceq_w_phr1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1032 %0 = bitcast i32 %a0.coerce to <2 x i16>
1039 define { i32 } @test__builtin_mips_precequ_ph_qbl1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1043 %0 = bitcast i32 %a0.coerce to <4 x i8>
1052 define { i32 } @test__builtin_mips_precequ_ph_qbr1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1056 %0 = bitcast i32 %a0.coerce to <4 x i8>
1065 define { i32 } @test__builtin_mips_precequ_ph_qbla1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1069 %0 = bitcast i32 %a0.coerce to <4 x i8>
1078 define { i32 } @test__builtin_mips_precequ_ph_qbra1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1082 %0 = bitcast i32 %a0.coerce to <4 x i8>
1091 define { i32 } @test__builtin_mips_preceu_ph_qbl1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1095 %0 = bitcast i32 %a0.coerce to <4 x i8>
1104 define { i32 } @test__builtin_mips_preceu_ph_qbr1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1108 %0 = bitcast i32 %a0.coerce to <4 x i8>
1117 define { i32 } @test__builtin_mips_preceu_ph_qbla1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1121 %0 = bitcast i32 %a0.coerce to <4 x i8>
1130 define { i32 } @test__builtin_mips_preceu_ph_qbra1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1134 %0 = bitcast i32 %a0.coerce to <4 x i8>