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Lines Matching refs:NO

14 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,32R2-NO-F…
16 ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,32R2-NO…
19 ; RUN: llc -march=mips64 -mcpu=mips64 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,64-NO-FP6…
21 ; RUN: llc -march=mips64el -mcpu=mips64 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,64-NO-F…
33 ; 32R2-NO-FP64A-LE-NOT:     addiu   $sp, $sp
34 ; 32R2-NO-FP64A-LE:         mtc1    $4, $f0
35 ; 32R2-NO-FP64A-LE:         mthc1   $5, $f0
37 ; 32R2-NO-FP64A-BE-NOT:     addiu   $sp, $sp
38 ; 32R2-NO-FP64A-BE:         mtc1    $5, $f0
39 ; 32R2-NO-FP64A-BE:         mthc1   $4, $f0
46 ; 64-NO-FP64A:              daddiu  $sp, $sp, -64
47 ; 64-NO-FP64A:              mov.d   $f0, $f12
55 ; 32R2-NO-FP64A-LE:     mtc1    $6, $f0
56 ; 32R2-NO-FP64A-LE:     mthc1   $7, $f0
58 ; 32R2-NO-FP64A-BE:     mtc1    $7, $f0
59 ; 32R2-NO-FP64A-BE:     mthc1   $6, $f0
66 ; 64-NO-FP64A-NOT:      daddiu  $sp, $sp
67 ; 64-NO-FP64A:          mov.d   $f0, $f13
75 ; 32R2-NO-FP64A-LE:     mtc1    $6, $f0
76 ; 32R2-NO-FP64A-LE:     mthc1   $7, $f0
78 ; 32R2-NO-FP64A-BE:     mtc1    $7, $f0
79 ; 32R2-NO-FP64A-BE:     mthc1   $6, $f0
86 ; 64-NO-FP64A-NOT:      daddiu  $sp, $sp
87 ; 64-NO-FP64A:          mov.d   $f0, $f14
95 ; 32R2-NO-FP64A-LE:     mtc1    $6, $f0
96 ; 32R2-NO-FP64A-LE:     mthc1   $7, $f0
98 ; 32R2-NO-FP64A-BE:     mtc1    $7, $f0
99 ; 32R2-NO-FP64A-BE:     mthc1   $6, $f0
106 ; 64-NO-FP64A:          daddiu  $sp, $sp, -48
107 ; 64-NO-FP64A:          mov.d   $f0, $f13
116 ; 32R2-NO-FP64A-LE-DAG:     mtc1    $4, $[[T0:f[0-9]+]]
117 ; 32R2-NO-FP64A-LE-DAG:     mthc1   $5, $[[T0:f[0-9]+]]
118 ; 32R2-NO-FP64A-LE-DAG:     mtc1    $6, $[[T1:f[0-9]+]]
119 ; 32R2-NO-FP64A-LE-DAG:     mthc1   $7, $[[T1:f[0-9]+]]
120 ; 32R2-NO-FP64A-LE:         sub.d   $f0, $[[T0]], $[[T1]]
122 ; 32R2-NO-FP64A-BE-DAG:     mtc1    $5, $[[T0:f[0-9]+]]
123 ; 32R2-NO-FP64A-BE-DAG:     mthc1   $4, $[[T0:f[0-9]+]]
124 ; 32R2-NO-FP64A-BE-DAG:     mtc1    $7, $[[T1:f[0-9]+]]
125 ; 32R2-NO-FP64A-BE-DAG:     mthc1   $6, $[[T1:f[0-9]+]]
126 ; 32R2-NO-FP64A-BE:         sub.d   $f0, $[[T0]], $[[T1]]
137 ; 64-NO-FP64A:              sub.d   $f0, $f12, $f13
147 ; 32R2-NO-FP64A-LE-DAG: mfc1    $6, $f0
148 ; 32R2-NO-FP64A-LE-DAG: mfhc1   $7, $f0
150 ; 32R2-NO-FP64A-BE-DAG: mfc1    $7, $f0
151 ; 32R2-NO-FP64A-BE-DAG: mfhc1   $6, $f0
160 ; 64-NO-FP64A:          mov.d   $f13, $f0