Lines Matching +full:- +full:- +full:hard
1 … RUN: llc < %s -march=sparcv9 -disable-sparc-delay-filler -disable-sparc-leaf-proc | FileCheck %s …
2 …: llc < %s -march=sparcv9 -disable-sparc-delay-filler -disable-sparc-leaf-proc -mattr=soft-float |…
4 ; CHECK-LABEL: intarg:
7 ; CHECK: save %sp, -128, %sp
8 ; CHECK: ldx [%fp+2231], [[R2:%[gilo][0-7]]]
9 ; CHECK: ld [%fp+2227], [[R1:%[gilo][0-7]]]
41 ; CHECK-LABEL: call_intarg:
43 ; CHECK: save %sp, -192, %sp
44 ; Sign-extend and store the full 64 bits.
45 ; CHECK: sra %i0, 0, [[R:%[gilo][0-7]]]
46 ; Use %o0-%o5 for outgoing arguments
50 ; CHECK-NOT: add %sp
57 ; CHECK-LABEL: floatarg:
58 ; HARD: save %sp, -128, %sp
59 ; HARD: ld [%fp+2307], [[F:%f[0-9]+]]
60 ; HARD: fstod %f1,
61 ; HARD: faddd %f2,
62 ; HARD: faddd %f4,
63 ; HARD: faddd %f6,
64 ; HARD: fadds %f31, [[F]]
65 ; SOFT: save %sp, -176, %sp
67 ; SOFT-NEXT: call __extendsfdf2
102 ; CHECK-LABEL: call_floatarg:
103 ; CHECK: save %sp, -272, %sp
105 ; HARD: std %f2, [%sp+2311]
106 ; Store 4 bytes, right-aligned in slot.
107 ; HARD: st %f1, [%sp+2307]
108 ; HARD: fmovd %f2, %f4
128 ; CHECK-NOT: add %sp
141 ; CHECK-LABEL: mixedarg:
145 ; HARD: fstod %f3
146 ; HARD: faddd %f6
147 ; HARD: faddd %f16
149 ; SOFT-NEXT: mov %i3, %o0
150 ; SOFT-NEXT: mov %i1, %o1
151 ; SOFT-NEXT: call __adddf3
153 ; SOFT-NEXT: mov %i0, %o0
154 ; SOFT-NEXT: mov %i1, %o1
155 ; SOFT-NEXT: call __adddf3
156 ; HARD: std %f0, [%i1]
177 ; CHECK-LABEL: call_mixedarg:
181 ; HARD: fmovd %f2, %f6
182 ; HARD: fmovd %f2, %f16
185 ; CHECK-NOT: add %sp
202 ; The inreg attribute is used to indicate 32-bit sized struct elements that
203 ; share an 8-byte slot.
204 ; CHECK-LABEL: inreg_fi:
205 ; SOFT: srlx %i0, 32, [[R:%[gilo][0-7]]]
206 ; HARD: fstoi %f1
208 ; HARD: srlx %i0, 32, [[R:%[gilo][0-7]]]
217 ; CHECK-LABEL: call_inreg_fi:
219 ; CHECK: save %sp, -176, %sp
220 ; HARD: sllx %i1, 32, %o0
221 ; HARD: fmovs %f5, %f1
231 ; CHECK-LABEL: inreg_ff:
232 ; HARD: fsubs %f0, %f1, %f0
242 ; CHECK-LABEL: call_inreg_ff:
243 ; HARD: fmovs %f3, %f0
244 ; HARD: fmovs %f5, %f1
254 ; CHECK-LABEL: inreg_if:
255 ; HARD: fstoi %f0
266 ; CHECK-LABEL: call_inreg_if:
267 ; HARD: fmovs %f3, %f0
268 ; HARD: mov %i2, %o0
279 ; CHECK-LABEL: inreg_ii:
280 ; CHECK: srlx %i0, 32, [[R:%[gilo][0-7]]]
288 ; CHECK-LABEL: call_inreg_ii:
289 ; CHECK: srl %i2, 0, [[R2:%[gilo][0-7]]]
290 ; CHECK: sllx %i1, 32, [[R1:%[gilo][0-7]]]
299 ; CHECK-LABEL: ret_i64_pair:
311 ; CHECK-LABEL: call_ret_i64_pair:
326 ; CHECK-LABEL: ret_i32_float_pair:
328 ; HARD: ld [%i3], %f2
340 ; CHECK-LABEL: call_ret_i32_float_pair:
343 ; HARD: st %f2, [%i1]
356 ; CHECK-LABEL: ret_i32_float_packed:
357 ; CHECK: ld [%i2], [[R:%[gilo][0-7]]]
358 ; HARD: ld [%i3], %f1
371 ; CHECK-LABEL: call_ret_i32_float_packed:
373 ; CHECK: srlx %o0, 32, [[R:%[gilo][0-7]]]
375 ; HARD: st %f1, [%i1]
389 ; CHECK-LABEL: ret_i32_packed:
390 ; CHECK: ld [%i2], [[R1:%[gilo][0-7]]]
391 ; CHECK: ld [%i3], [[R2:%[gilo][0-7]]]
392 ; CHECK: sllx [[R2]], 32, [[R3:%[gilo][0-7]]]
404 ; CHECK-LABEL: call_ret_i32_packed:
406 ; CHECK: srlx %o0, 32, [[R:%[gilo][0-7]]]
419 ; The return value must be sign-extended to 64 bits.
420 ; CHECK-LABEL: ret_sext:
426 ; CHECK-LABEL: ret_zext:
432 ; CHECK-LABEL: ret_nosext:
433 ; CHECK-NOT: sra
438 ; CHECK-LABEL: ret_nozext:
439 ; CHECK-NOT: srl
444 ; CHECK-LABEL: test_register_directive:
458 ; CHECK-LABEL: test_large_stack:
461 ; CHECK: xor %g1, -176, %g1
465 ; CHECK: xor %g1, -1, %g1
479 ; CHECK-LABEL: test_fp128_args:
480 ; HARD-DAG: std %f0, [%fp+{{.+}}]
481 ; HARD-DAG: std %f2, [%fp+{{.+}}]
482 ; HARD-DAG: std %f6, [%fp+{{.+}}]
483 ; HARD-DAG: std %f4, [%fp+{{.+}}]
484 ; HARD: add %fp, [[Offset:[0-9]+]], %o0
485 ; HARD: call _Qp_add
486 ; HARD: ldd [%fp+[[Offset]]], %f0
487 ; SOFT-DAG: mov %i0, %o0
488 ; SOFT-DAG: mov %i1, %o1
489 ; SOFT-DAG: mov %i2, %o2
490 ; SOFT-DAG: mov %i3, %o3
503 ; CHECK-LABEL: test_fp128_variable_args:
504 ; HARD-DAG: std %f4, [%sp+[[Offset0:[0-9]+]]]
505 ; HARD-DAG: std %f6, [%sp+[[Offset1:[0-9]+]]]
506 ; HARD-DAG: ldx [%sp+[[Offset0]]], %o2
507 ; HARD-DAG: ldx [%sp+[[Offset1]]], %o3
508 ; SOFT-DAG: mov %i0, %o0
509 ; SOFT-DAG: mov %i1, %o1
510 ; SOFT-DAG: mov %i2, %o2
518 ; CHECK-LABEL: test_call_libfunc:
519 ; HARD: st %f1, [%fp+[[Offset0:[0-9]+]]]
520 ; HARD: fmovs %f3, %f1
523 ; HARD: st %f0, [%fp+[[Offset1:[0-9]+]]]
524 ; HARD: ld [%fp+[[Offset0]]], %f1
528 ; HARD: ld [%fp+[[Offset1]]], %f1
529 ; HARD: fmuls %f1, %f0, %f0