Lines Matching refs:avx

1 ; RUN: llc -O3 -disable-peephole -mcpu=corei7-avx -mattr=+avx < %s | FileCheck %s
6 ; pr18846 - needless avx spill/reload
58   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> %add.i4577) #1
70   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> %add.i4547) #1
71   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> %add.i4545) #1
72   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> %add.i4543) #1
80   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> %add.i4439) #1
81   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> %add.i4437) #1
86   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> zeroinitializer) #1
87   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> %add.i4399) #1
88   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> %add.i4397) #1
89   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> undef) #1
90   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> undef) #1
93   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> %add.i4329) #1
94   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> undef) #1
106   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> %add.i4295) #1
107   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> %add.i4293) #1
108   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> %add.i4291) #1
109   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> %add.i4289) #1
117   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> %add.i4257) #1
118   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> %add.i4253) #1
121   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> zeroinitializer) #1
122   call void @llvm.x86.avx.storeu.ps.256(i8* undef, <8 x float> %add.i) #1
127 declare void @llvm.x86.avx.storeu.ps.256(i8*, <8 x float>) #1