Lines Matching refs:r1
17 ADDS r1, r1, #8 // T2
18 // CHECK: adds r1, #8 @ encoding: [0x08,0x31]
19 ADDS.W r1, r1, #8 // .w => T3
20 // CHECK: adds.w r1, r1, #8 @ encoding: [0x11,0xf1,0x08,0x01]
30 ADDEQ r1, r1, #8 // T2
31 // CHECK: addeq r1, #8 @ encoding: [0x08,0x31]
39 ADDSEQ r1, r1, #8 // T3
40 // CHECK: addseq.w r1, r1, #8 @ encoding: [0x11,0xf1,0x08,0x01]
43 ADDS r0, r2, r1 // ADDS has T1 narrow 3 operand
44 // CHECK: adds r0, r2, r1 @ encoding: [0x50,0x18]
45 ADDS r2, r2, r1 // ADDS has T1 narrow 3 operand
46 // CHECK: adds r2, r2, r1 @ encoding: [0x52,0x18]
47 ADD r3, r1, r3 // T2
48 // CHECK: add r3, r1 @ encoding: [0x0b,0x44]
52 ADDEQ r0, r2, r1 // (In IT) ADD has T1 narrow 3 operand
53 // CHECK: addeq r0, r2, r1 @ encoding: [0x50,0x18]
56 ADDEQ r2, r2, r1 // (In IT) ADD has T1 narrow 3 operand
57 // CHECK: addeq r2, r2, r1 @ encoding: [0x52,0x18]
61 ADDSEQ r0, r2, r1 // T3
62 // CHECK: addseq.w r0, r2, r1 @ encoding: [0x12,0xeb,0x01,0x00]
65 ADDSEQ r2, r2, r1 // T3
66 // CHECK: addseq.w r2, r2, r1 @ encoding: [0x12,0xeb,0x01,0x02]
68 ADD r3, r3, r1 // T2
69 // CHECK: add r3, r1 @ encoding: [0x0b,0x44]
106 ANDS r0, r2, r1 // Must be wide - 3 distinct registers
107 ANDS r2, r2, r1 // Should choose narrow
108 ANDS r2, r1, r2 // Should choose narrow - commutative
109 ANDS.W r0, r0, r1 // Explicitly wide
110 ANDS.W r3, r1, r3
111 AND r0, r1, r0 // Must use wide encoding as not flag-setting
112 ANDS r7, r7, r1 // Should use narrow
113 ANDS r7, r1, r7 // Commutative
114 ANDS r8, r1, r8 // high registers so must use wide encoding
115 ANDS r8, r8, r1
117 ANDS r1, r1, r8
118 ANDS r2, r2, r1, lsl #1 // Must use wide - shifted register
119 ANDS r0, r1, r0, lsr #1
120 // CHECK: ands.w r0, r2, r1 @ encoding: [0x12,0xea,0x01,0x00]
121 // CHECK: ands r2, r1 @ encoding: [0x0a,0x40]
122 // CHECK: ands r2, r1 @ encoding: [0x0a,0x40]
123 // CHECK: ands.w r0, r0, r1 @ encoding: [0x10,0xea,0x01,0x00]
124 // CHECK: ands.w r3, r1, r3 @ encoding: [0x11,0xea,0x03,0x03]
125 // CHECK: and.w r0, r1, r0 @ encoding: [0x01,0xea,0x00,0x00]
126 // CHECK: ands r7, r1 @ encoding: [0x0f,0x40]
127 // CHECK: ands r7, r1 @ encoding: [0x0f,0x40]
128 // CHECK: ands.w r8, r1, r8 @ encoding: [0x11,0xea,0x08,0x08]
129 // CHECK: ands.w r8, r8, r1 @ encoding: [0x18,0xea,0x01,0x08]
131 // CHECK: ands.w r1, r1, r8 @ encoding: [0x11,0xea,0x08,0x01]
132 // CHECK: ands.w r2, r2, r1, lsl #1 @ encoding: [0x12,0xea,0x41,0x02]
133 // CHECK: ands.w r0, r1, r0, lsr #1 @ encoding: [0x11,0xea,0x50,0x00]
136 ANDEQ r0, r2, r1 // Must be wide - 3 distinct registers
138 ANDEQ r3, r3, r1 // Should choose narrow
140 ANDEQ r3, r1, r3 // Should choose narrow - commutative
142 ANDEQ.W r0, r0, r1 // Explicitly wide
144 ANDEQ.W r2, r1, r2
146 ANDSEQ r0, r1, r0 // Must use wide encoding as flag-setting
148 ANDEQ r7, r7, r1 // Should use narrow
150 ANDEQ r7, r1, r7 // Commutative
152 ANDEQ r8, r1, r8 // high registers so must use wide encoding
154 ANDEQ r8, r8, r1
160 ANDEQ r0, r0, r1, lsl #1 // Must use wide - shifted register
162 ANDEQ r5, r1, r5, lsr #1
164 // CHECK: andeq.w r0, r2, r1 @ encoding: [0x02,0xea,0x01,0x00]
166 // CHECK: andeq r3, r1 @ encoding: [0x0b,0x40]
168 // CHECK: andeq r3, r1 @ encoding: [0x0b,0x40]
170 // CHECK: andeq.w r0, r0, r1 @ encoding: [0x00,0xea,0x01,0x00]
172 // CHECK: andeq.w r2, r1, r2 @ encoding: [0x01,0xea,0x02,0x02]
174 // CHECK: andseq.w r0, r1, r0 @ encoding: [0x11,0xea,0x00,0x00]
176 // CHECK: andeq r7, r1 @ encoding: [0x0f,0x40]
178 // CHECK: andeq r7, r1 @ encoding: [0x0f,0x40]
180 // CHECK: andeq.w r8, r1, r8 @ encoding: [0x01,0xea,0x08,0x08]
182 // CHECK: andeq.w r8, r8, r1 @ encoding: [0x08,0xea,0x01,0x08]
188 // CHECK: andeq.w r0, r0, r1, lsl #1 @ encoding: [0x00,0xea,0x41,0x00]
190 // CHECK: andeq.w r5, r1, r5, lsr #1 @ encoding: [0x01,0xea,0x55,0x05]
193 EORS r0, r2, r1 // Must be wide - 3 distinct registers
194 EORS r5, r5, r1 // Should choose narrow
195 EORS r5, r1, r5 // Should choose narrow - commutative
196 EORS.W r0, r0, r1 // Explicitly wide
197 EORS.W r2, r1, r2
198 EOR r1, r1, r1 // Must use wide encoding as not flag-setting
199 EORS r7, r7, r1 // Should use narrow
200 EORS r7, r1, r7 // Commutative
201 EORS r8, r1, r8 // high registers so must use wide encoding
202 EORS r8, r8, r1
205 EORS r2, r2, r1, lsl #1 // Must use wide - shifted register
206 EORS r0, r1, r0, lsr #1
207 // CHECK: eors.w r0, r2, r1 @ encoding: [0x92,0xea,0x01,0x00]
208 // CHECK: eors r5, r1 @ encoding: [0x4d,0x40]
209 // CHECK: eors r5, r1 @ encoding: [0x4d,0x40]
210 // CHECK: eors.w r0, r0, r1 @ encoding: [0x90,0xea,0x01,0x00]
211 // CHECK: eors.w r2, r1, r2 @ encoding: [0x91,0xea,0x02,0x02]
212 // CHECK: eor.w r1, r1, r1 @ encoding: [0x81,0xea,0x01,0x01]
213 // CHECK: eors r7, r1 @ encoding: [0x4f,0x40]
214 // CHECK: eors r7, r1 @ encoding: [0x4f,0x40]
215 // CHECK: eors.w r8, r1, r8 @ encoding: [0x91,0xea,0x08,0x08]
216 // CHECK: eors.w r8, r8, r1 @ encoding: [0x98,0xea,0x01,0x08]
219 // CHECK: eors.w r2, r2, r1, lsl #1 @ encoding: [0x92,0xea,0x41,0x02]
220 // CHECK: eors.w r0, r1, r0, lsr #1 @ encoding: [0x91,0xea,0x50,0x00]
223 EOREQ r3, r2, r1 // Must be wide - 3 distinct registers
225 EOREQ r0, r0, r1 // Should choose narrow
227 EOREQ r2, r1, r2 // Should choose narrow - commutative
229 EOREQ.W r3, r3, r1 // Explicitly wide
231 EOREQ.W r0, r1, r0
233 EORSEQ r1, r1, r1 // Must use wide encoding as flag-setting
235 EOREQ r7, r7, r1 // Should use narrow
237 EOREQ r7, r1, r7 // Commutative
239 EOREQ r8, r1, r8 // high registers so must use wide encoding
241 EOREQ r8, r8, r1
247 EOREQ r4, r4, r1, lsl #1 // Must use wide - shifted register
249 EOREQ r0, r1, r0, lsr #1
251 // CHECK: eoreq.w r3, r2, r1 @ encoding: [0x82,0xea,0x01,0x03]
253 // CHECK: eoreq r0, r1 @ encoding: [0x48,0x40]
255 // CHECK: eoreq r2, r1 @ encoding: [0x4a,0x40]
257 // CHECK: eoreq.w r3, r3, r1 @ encoding: [0x83,0xea,0x01,0x03]
259 // CHECK: eoreq.w r0, r1, r0 @ encoding: [0x81,0xea,0x00,0x00]
261 // CHECK: eorseq.w r1, r1, r1 @ encoding: [0x91,0xea,0x01,0x01]
263 // CHECK: eoreq r7, r1 @ encoding: [0x4f,0x40]
265 // CHECK: eoreq r7, r1 @ encoding: [0x4f,0x40]
267 // CHECK: eoreq.w r8, r1, r8 @ encoding: [0x81,0xea,0x08,0x08]
269 // CHECK: eoreq.w r8, r8, r1 @ encoding: [0x88,0xea,0x01,0x08]
275 // CHECK: eoreq.w r4, r4, r1, lsl #1 @ encoding: [0x84,0xea,0x41,0x04]
277 // CHECK: eoreq.w r0, r1, r0, lsr #1 @ encoding: [0x81,0xea,0x50,0x00]
280 LSLS r0, r2, r1 // Must be wide - 3 distinct registers
281 LSLS r2, r2, r1 // Should choose narrow
282 LSLS r2, r1, r2 // Should choose wide - not commutative
283 LSLS.W r0, r0, r1 // Explicitly wide
284 LSLS.W r4, r1, r4
285 LSL r4, r1, r4 // Must use wide encoding as not flag-setting
286 LSLS r7, r7, r1 // Should use narrow
287 LSLS r8, r1, r8 // high registers so must use wide encoding
288 LSLS r8, r8, r1
291 // CHECK: lsls.w r0, r2, r1 @ encoding: [0x12,0xfa,0x01,0xf0]
292 // CHECK: lsls r2, r1 @ encoding: [0x8a,0x40]
293 // CHECK: lsls.w r2, r1, r2 @ encoding: [0x11,0xfa,0x02,0xf2]
294 // CHECK: lsls.w r0, r0, r1 @ encoding: [0x10,0xfa,0x01,0xf0]
295 // CHECK: lsls.w r4, r1, r4 @ encoding: [0x11,0xfa,0x04,0xf4]
296 // CHECK: lsl.w r4, r1, r4 @ encoding: [0x01,0xfa,0x04,0xf4]
297 // CHECK: lsls r7, r1 @ encoding: [0x8f,0x40]
298 // CHECK: lsls.w r8, r1, r8 @ encoding: [0x11,0xfa,0x08,0xf8]
299 // CHECK: lsls.w r8, r8, r1 @ encoding: [0x18,0xfa,0x01,0xf8]
304 LSLEQ r0, r2, r1 // Must be wide - 3 distinct registers
306 LSLEQ r2, r2, r1 // Should choose narrow
308 LSLEQ r2, r1, r2 // Should choose wide - not commutative
310 LSLEQ.W r0, r0, r1 // Explicitly wide
312 LSLEQ.W r3, r1, r3
314 LSLSEQ r4, r1, r4 // Must use wide encoding as flag-setting
316 LSLEQ r7, r7, r1 // Should use narrow
318 LSLEQ r8, r1, r8 // high registers so must use wide encoding
320 LSLEQ r8, r8, r1
326 // CHECK: lsleq.w r0, r2, r1 @ encoding: [0x02,0xfa,0x01,0xf0]
328 // CHECK: lsleq r2, r1 @ encoding: [0x8a,0x40]
330 // CHECK: lsleq.w r2, r1, r2 @ encoding: [0x01,0xfa,0x02,0xf2]
332 // CHECK: lsleq.w r0, r0, r1 @ encoding: [0x00,0xfa,0x01,0xf0]
334 // CHECK: lsleq.w r3, r1, r3 @ encoding: [0x01,0xfa,0x03,0xf3]
336 // CHECK: lslseq.w r4, r1, r4 @ encoding: [0x11,0xfa,0x04,0xf4]
338 // CHECK: lsleq r7, r1 @ encoding: [0x8f,0x40]
340 // CHECK: lsleq.w r8, r1, r8 @ encoding: [0x01,0xfa,0x08,0xf8]
342 // CHECK: lsleq.w r8, r8, r1 @ encoding: [0x08,0xfa,0x01,0xf8]
349 LSRS r6, r2, r1 // Must be wide - 3 distinct registers
350 LSRS r2, r2, r1 // Should choose narrow
351 LSRS r2, r1, r2 // Should choose wide - not commutative
352 LSRS.W r2, r2, r1 // Explicitly wide
353 LSRS.W r3, r1, r3
354 LSR r4, r1, r4 // Must use wide encoding as not flag-setting
355 LSRS r7, r7, r1 // Should use narrow
356 LSRS r8, r1, r8 // high registers so must use wide encoding
357 LSRS r8, r8, r1
360 // CHECK: lsrs.w r6, r2, r1 @ encoding: [0x32,0xfa,0x01,0xf6]
361 // CHECK: lsrs r2, r1 @ encoding: [0xca,0x40]
362 // CHECK: lsrs.w r2, r1, r2 @ encoding: [0x31,0xfa,0x02,0xf2]
363 // CHECK: lsrs.w r2, r2, r1 @ encoding: [0x32,0xfa,0x01,0xf2]
364 // CHECK: lsrs.w r3, r1, r3 @ encoding: [0x31,0xfa,0x03,0xf3]
365 // CHECK: lsr.w r4, r1, r4 @ encoding: [0x21,0xfa,0x04,0xf4]
366 // CHECK: lsrs r7, r1 @ encoding: [0xcf,0x40]
367 // CHECK: lsrs.w r8, r1, r8 @ encoding: [0x31,0xfa,0x08,0xf8]
368 // CHECK: lsrs.w r8, r8, r1 @ encoding: [0x38,0xfa,0x01,0xf8]
373 LSREQ r6, r2, r1 // Must be wide - 3 distinct registers
375 LSREQ r7, r7, r1 // Should choose narrow
377 LSREQ r7, r1, r7 // Should choose wide - not commutative
379 LSREQ.W r7, r7, r1 // Explicitly wide
381 LSREQ.W r2, r1, r2
383 LSRSEQ r0, r1, r0 // Must use wide encoding as flag-setting
385 LSREQ r7, r7, r1 // Should use narrow
387 LSREQ r8, r1, r8 // high registers so must use wide encoding
389 LSREQ r8, r8, r1
391 LSREQ r1, r8, r1
395 // CHECK: lsreq.w r6, r2, r1 @ encoding: [0x22,0xfa,0x01,0xf6]
397 // CHECK: lsreq r7, r1 @ encoding: [0xcf,0x40]
399 // CHECK: lsreq.w r7, r1, r7 @ encoding: [0x21,0xfa,0x07,0xf7]
401 // CHECK: lsreq.w r7, r7, r1 @ encoding: [0x27,0xfa,0x01,0xf7]
403 // CHECK: lsreq.w r2, r1, r2 @ encoding: [0x21,0xfa,0x02,0xf2]
405 // CHECK: lsrseq.w r0, r1, r0 @ encoding: [0x31,0xfa,0x00,0xf0]
407 // CHECK: lsreq r7, r1 @ encoding: [0xcf,0x40]
409 // CHECK: lsreq.w r8, r1, r8 @ encoding: [0x21,0xfa,0x08,0xf8]
411 // CHECK: lsreq.w r8, r8, r1 @ encoding: [0x28,0xfa,0x01,0xf8]
413 // CHECK: lsreq.w r1, r8, r1 @ encoding: [0x28,0xfa,0x01,0xf1]
419 ASRS r0, r0, r1 // Should choose narrow
420 ASRS r0, r1, r0 // Should choose wide - not commutative
421 ASRS.W r3, r3, r1 // Explicitly wide
422 ASRS.W r1, r1, r1
423 ASR r0, r1, r0 // Must use wide encoding as not flag-setting
424 ASRS r7, r7, r1 // Should use narrow
425 ASRS r8, r1, r8 // high registers so must use wide encoding
426 ASRS r8, r8, r1
430 // CHECK: asrs r0, r1 @ encoding: [0x08,0x41]
431 // CHECK: asrs.w r0, r1, r0 @ encoding: [0x51,0xfa,0x00,0xf0]
432 // CHECK: asrs.w r3, r3, r1 @ encoding: [0x53,0xfa,0x01,0xf3]
433 // CHECK: asrs.w r1, r1, r1 @ encoding: [0x51,0xfa,0x01,0xf1]
434 // CHECK: asr.w r0, r1, r0 @ encoding: [0x41,0xfa,0x00,0xf0]
435 // CHECK: asrs r7, r1 @ encoding: [0x0f,0x41]
436 // CHECK: asrs.w r8, r1, r8 @ encoding: [0x51,0xfa,0x08,0xf8]
437 // CHECK: asrs.w r8, r8, r1 @ encoding: [0x58,0xfa,0x01,0xf8]
442 ASREQ r0, r2, r1 // Must be wide - 3 distinct registers
444 ASREQ r2, r2, r1 // Should choose narrow
446 ASREQ r1, r2, r1 // Should choose wide - not commutative
448 ASREQ.W r4, r4, r1 // Explicitly wide
450 ASREQ.W r6, r1, r6
452 ASRSEQ r3, r1, r3 // Must use wide encoding as flag-setting
454 ASREQ r7, r7, r1 // Should use narrow
456 ASREQ r8, r1, r8 // high registers so must use wide encoding
458 ASREQ r8, r8, r1
460 ASREQ r1, r8, r1
464 // CHECK: asreq.w r0, r2, r1 @ encoding: [0x42,0xfa,0x01,0xf0]
466 // CHECK: asreq r2, r1 @ encoding: [0x0a,0x41]
468 // CHECK: asreq.w r1, r2, r1 @ encoding: [0x42,0xfa,0x01,0xf1]
470 // CHECK: asreq.w r4, r4, r1 @ encoding: [0x44,0xfa,0x01,0xf4]
472 // CHECK: asreq.w r6, r1, r6 @ encoding: [0x41,0xfa,0x06,0xf6]
474 // CHECK: asrseq.w r3, r1, r3 @ encoding: [0x51,0xfa,0x03,0xf3]
476 // CHECK: asreq r7, r1 @ encoding: [0x0f,0x41]
478 // CHECK: asreq.w r8, r1, r8 @ encoding: [0x41,0xfa,0x08,0xf8]
480 // CHECK: asreq.w r8, r8, r1 @ encoding: [0x48,0xfa,0x01,0xf8]
482 // CHECK: asreq.w r1, r8, r1 @ encoding: [0x48,0xfa,0x01,0xf1]
487 ADCS r5, r2, r1 // Must be wide - 3 distinct registers
488 ADCS r5, r5, r1 // Should choose narrow
489 ADCS r3, r1, r3 // Should choose narrow - commutative
490 ADCS.W r2, r2, r1 // Explicitly wide
491 ADCS.W r3, r1, r3
492 ADC r0, r1, r0 // Must use wide encoding as not flag-setting
493 ADCS r7, r7, r1 // Should use narrow
494 ADCS r7, r1, r7 // Commutative
495 ADCS r8, r1, r8 // high registers so must use wide encoding
496 ADCS r8, r8, r1
499 ADCS r3, r3, r1, lsl #1 // Must use wide - shifted register
500 ADCS r4, r1, r4, lsr #1
501 // CHECK: adcs.w r5, r2, r1 @ encoding: [0x52,0xeb,0x01,0x05]
502 // CHECK: adcs r5, r1 @ encoding: [0x4d,0x41]
503 // CHECK: adcs r3, r1 @ encoding: [0x4b,0x41]
504 // CHECK: adcs.w r2, r2, r1 @ encoding: [0x52,0xeb,0x01,0x02]
505 // CHECK: adcs.w r3, r1, r3 @ encoding: [0x51,0xeb,0x03,0x03]
506 // CHECK: adc.w r0, r1, r0 @ encoding: [0x41,0xeb,0x00,0x00]
507 // CHECK: adcs r7, r1 @ encoding: [0x4f,0x41]
508 // CHECK: adcs r7, r1 @ encoding: [0x4f,0x41]
509 // CHECK: adcs.w r8, r1, r8 @ encoding: [0x51,0xeb,0x08,0x08]
510 // CHECK: adcs.w r8, r8, r1 @ encoding: [0x58,0xeb,0x01,0x08]
513 // CHECK: adcs.w r3, r3, r1, lsl #1 @ encoding: [0x53,0xeb,0x41,0x03]
514 // CHECK: adcs.w r4, r1, r4, lsr #1 @ encoding: [0x51,0xeb,0x54,0x04]
517 ADCEQ r1, r2, r3 // Must be wide - 3 distinct registers
519 ADCEQ r1, r1, r1 // Should choose narrow
521 ADCEQ r3, r1, r3 // Should choose narrow - commutative
523 ADCEQ.W r3, r3, r1 // Explicitly wide
525 ADCEQ.W r0, r1, r0
527 ADCSEQ r3, r1, r3 // Must use wide encoding as flag-setting
529 ADCEQ r7, r7, r1 // Should use narrow
531 ADCEQ r7, r1, r7 // Commutative
533 ADCEQ r8, r1, r8 // high registers so must use wide encoding
535 ADCEQ r8, r8, r1
539 ADCEQ r1, r1, r8
541 ADCEQ r2, r2, r1, lsl #1 // Must use wide - shifted register
543 ADCEQ r1, r1, r1, lsr #1
545 // CHECK: adceq.w r1, r2, r3 @ encoding: [0x42,0xeb,0x03,0x01]
547 // CHECK: adceq r1, r1 @ encoding: [0x49,0x41]
549 // CHECK: adceq r3, r1 @ encoding: [0x4b,0x41]
551 // CHECK: adceq.w r3, r3, r1 @ encoding: [0x43,0xeb,0x01,0x03]
553 // CHECK: adceq.w r0, r1, r0 @ encoding: [0x41,0xeb,0x00,0x00]
555 // CHECK: adcseq.w r3, r1, r3 @ encoding: [0x51,0xeb,0x03,0x03]
557 // CHECK: adceq r7, r1 @ encoding: [0x4f,0x41]
559 // CHECK: adceq r7, r1 @ encoding: [0x4f,0x41]
561 // CHECK: adceq.w r8, r1, r8 @ encoding: [0x41,0xeb,0x08,0x08]
563 // CHECK: adceq.w r8, r8, r1 @ encoding: [0x48,0xeb,0x01,0x08]
567 // CHECK: adceq.w r1, r1, r8 @ encoding: [0x41,0xeb,0x08,0x01]
569 // CHECK: adceq.w r2, r2, r1, lsl #1 @ encoding: [0x42,0xeb,0x41,0x02]
571 // CHECK: adceq.w r1, r1, r1, lsr #1 @ encoding: [0x41,0xeb,0x51,0x01]
574 SBCS r3, r2, r1 // Must be wide - 3 distinct registers
575 SBCS r4, r4, r1 // Should choose narrow
576 SBCS r1, r4, r1 // Should choose wide - not commutative
577 SBCS.W r4, r4, r1 // Explicitly wide
578 SBCS.W r2, r1, r2
579 SBC r0, r1, r0 // Must use wide encoding as not flag-setting
580 SBCS r7, r7, r1 // Should use narrow
581 SBCS r8, r1, r8 // high registers so must use wide encoding
582 SBCS r8, r8, r1
585 SBCS r2, r2, r1, lsl #1 // Must use wide - shifted register
586 SBCS r5, r1, r5, lsr #1
587 // CHECK: sbcs.w r3, r2, r1 @ encoding: [0x72,0xeb,0x01,0x03]
588 // CHECK: sbcs r4, r1 @ encoding: [0x8c,0x41]
589 // CHECK: sbcs.w r1, r4, r1 @ encoding: [0x74,0xeb,0x01,0x01]
590 // CHECK: sbcs.w r4, r4, r1 @ encoding: [0x74,0xeb,0x01,0x04]
591 // CHECK: sbcs.w r2, r1, r2 @ encoding: [0x71,0xeb,0x02,0x02]
592 // CHECK: sbc.w r0, r1, r0 @ encoding: [0x61,0xeb,0x00,0x00]
593 // CHECK: sbcs r7, r1 @ encoding: [0x8f,0x41]
594 // CHECK: sbcs.w r8, r1, r8 @ encoding: [0x71,0xeb,0x08,0x08]
595 // CHECK: sbcs.w r8, r8, r1 @ encoding: [0x78,0xeb,0x01,0x08]
598 // CHECK: sbcs.w r2, r2, r1, lsl #1 @ encoding: [0x72,0xeb,0x41,0x02]
599 // CHECK: sbcs.w r5, r1, r5, lsr #1 @ encoding: [0x71,0xeb,0x55,0x05]
602 SBCEQ r5, r2, r1 // Must be wide - 3 distinct registers
604 SBCEQ r5, r5, r1 // Should choose narrow
606 SBCEQ r1, r5, r1 // Should choose narrow
608 SBCEQ.W r5, r5, r1 // Explicitly wide
610 SBCEQ.W r0, r1, r0
612 SBCSEQ r2, r1, r2 // Must use wide encoding as flag-setting
614 SBCEQ r7, r7, r1 // Should use narrow
616 SBCEQ r8, r1, r8 // high registers so must use wide encoding
618 SBCEQ r8, r8, r1
624 SBCEQ r2, r2, r1, lsl #1 // Must use wide - shifted register
626 SBCEQ r5, r1, r5, lsr #1
628 // CHECK: sbceq.w r5, r2, r1 @ encoding: [0x62,0xeb,0x01,0x05]
630 // CHECK: sbceq r5, r1 @ encoding: [0x8d,0x41]
632 // CHECK: sbceq.w r1, r5, r1 @ encoding: [0x65,0xeb,0x01,0x01]
634 // CHECK: sbceq.w r5, r5, r1 @ encoding: [0x65,0xeb,0x01,0x05]
636 // CHECK: sbceq.w r0, r1, r0 @ encoding: [0x61,0xeb,0x00,0x00]
638 // CHECK: sbcseq.w r2, r1, r2 @ encoding: [0x71,0xeb,0x02,0x02]
640 // CHECK: sbceq r7, r1 @ encoding: [0x8f,0x41]
642 // CHECK: sbceq.w r8, r1, r8 @ encoding: [0x61,0xeb,0x08,0x08]
644 // CHECK: sbceq.w r8, r8, r1 @ encoding: [0x68,0xeb,0x01,0x08]
650 // CHECK: sbceq.w r2, r2, r1, lsl #1 @ encoding: [0x62,0xeb,0x41,0x02]
652 // CHECK: sbceq.w r5, r1, r5, lsr #1 @ encoding: [0x61,0xeb,0x55,0x05]
655 RORS r3, r2, r1 // Must be wide - 3 distinct registers
656 RORS r0, r0, r1 // Should choose narrow
657 RORS r1, r0, r1 // Should choose wide - not commutative
658 RORS.W r2, r2, r1 // Explicitly wide
659 RORS.W r2, r1, r2
660 ROR r5, r1, r5 // Must use wide encoding as not flag-setting
661 RORS r7, r7, r1 // Should use narrow
662 RORS r8, r1, r8 // high registers so must use wide encoding
663 RORS r8, r8, r1
666 // CHECK: rors.w r3, r2, r1 @ encoding: [0x72,0xfa,0x01,0xf3]
667 // CHECK: rors r0, r1 @ encoding: [0xc8,0x41]
668 // CHECK: rors.w r1, r0, r1 @ encoding: [0x70,0xfa,0x01,0xf1]
669 // CHECK: rors.w r2, r2, r1 @ encoding: [0x72,0xfa,0x01,0xf2]
670 // CHECK: rors.w r2, r1, r2 @ encoding: [0x71,0xfa,0x02,0xf2]
671 // CHECK: ror.w r5, r1, r5 @ encoding: [0x61,0xfa,0x05,0xf5]
672 // CHECK: rors r7, r1 @ encoding: [0xcf,0x41]
673 // CHECK: rors.w r8, r1, r8 @ encoding: [0x71,0xfa,0x08,0xf8]
674 // CHECK: rors.w r8, r8, r1 @ encoding: [0x78,0xfa,0x01,0xf8]
679 ROREQ r4, r2, r1 // Must be wide - 3 distinct registers
681 ROREQ r4, r4, r1 // Should choose narrow
683 ROREQ r1, r4, r1 // Should choose wide - not commutative
685 ROREQ.W r4, r4, r1 // Explicitly wide
687 ROREQ.W r0, r1, r0
689 RORSEQ r0, r1, r0 // Must use wide encoding as flag-setting
691 ROREQ r7, r7, r1 // Should use narrow
693 ROREQ r8, r1, r8 // high registers so must use wide encoding
695 ROREQ r8, r8, r1
699 ROREQ r1, r1, r8
701 // CHECK: roreq.w r4, r2, r1 @ encoding: [0x62,0xfa,0x01,0xf4]
703 // CHECK: roreq r4, r1 @ encoding: [0xcc,0x41]
705 // CHECK: roreq.w r1, r4, r1 @ encoding: [0x64,0xfa,0x01,0xf1]
707 // CHECK: roreq.w r4, r4, r1 @ encoding: [0x64,0xfa,0x01,0xf4]
709 // CHECK: roreq.w r0, r1, r0 @ encoding: [0x61,0xfa,0x00,0xf0]
711 // CHECK: rorseq.w r0, r1, r0 @ encoding: [0x71,0xfa,0x00,0xf0]
713 // CHECK: roreq r7, r1 @ encoding: [0xcf,0x41]
715 // CHECK: roreq.w r8, r1, r8 @ encoding: [0x61,0xfa,0x08,0xf8]
717 // CHECK: roreq.w r8, r8, r1 @ encoding: [0x68,0xfa,0x01,0xf8]
721 // CHECK: roreq.w r1, r1, r8 @ encoding: [0x61,0xfa,0x08,0xf1]
729 ORRS r7, r2, r1 // Must be wide - 3 distinct registers
730 ORRS r2, r2, r1 // Should choose narrow
731 ORRS r3, r1, r3 // Should choose narrow - commutative
732 ORRS.W r4, r4, r1 // Explicitly wide
733 ORRS.W r5, r1, r5
734 ORR r2, r1, r2 // Must use wide encoding as not flag-setting
735 ORRS r7, r7, r1 // Should use narrow
736 ORRS r7, r1, r7 // Commutative
737 ORRS r8, r1, r8 // high registers so must use wide encoding
738 ORRS r8, r8, r1
739 ORRS r1, r8, r1
741 ORRS r1, r1, r1, lsl #1 // Must use wide - shifted register
742 ORRS r0, r1, r0, lsr #1
743 // CHECK: orrs.w r7, r2, r1 @ encoding: [0x52,0xea,0x01,0x07]
744 // CHECK: orrs r2, r1 @ encoding: [0x0a,0x43]
745 // CHECK: orrs r3, r1 @ encoding: [0x0b,0x43]
746 // CHECK: orrs.w r4, r4, r1 @ encoding: [0x54,0xea,0x01,0x04]
747 // CHECK: orrs.w r5, r1, r5 @ encoding: [0x51,0xea,0x05,0x05]
748 // CHECK: orr.w r2, r1, r2 @ encoding: [0x41,0xea,0x02,0x02]
749 // CHECK: orrs r7, r1 @ encoding: [0x0f,0x43]
750 // CHECK: orrs r7, r1 @ encoding: [0x0f,0x43]
751 // CHECK: orrs.w r8, r1, r8 @ encoding: [0x51,0xea,0x08,0x08]
752 // CHECK: orrs.w r8, r8, r1 @ encoding: [0x58,0xea,0x01,0x08]
753 // CHECK: orrs.w r1, r8, r1 @ encoding: [0x58,0xea,0x01,0x01]
755 // CHECK: orrs.w r1, r1, r1, lsl #1 @ encoding: [0x51,0xea,0x41,0x01]
756 // CHECK: orrs.w r0, r1, r0, lsr #1 @ encoding: [0x51,0xea,0x50,0x00]
759 ORREQ r0, r2, r1 // Must be wide - 3 distinct registers
761 ORREQ r5, r5, r1 // Should choose narrow
763 ORREQ r5, r1, r5 // Should choose narrow - commutative
765 ORREQ.W r2, r2, r1 // Explicitly wide
767 ORREQ.W r3, r1, r3
769 ORRSEQ r4, r1, r4 // Must use wide encoding as flag-setting
771 ORREQ r7, r7, r1 // Should use narrow
773 ORREQ r7, r1, r7 // Commutative
775 ORREQ r8, r1, r8 // high registers so must use wide encoding
777 ORREQ r8, r8, r1
783 ORREQ r2, r2, r1, lsl #1 // Must use wide - shifted register
785 ORREQ r2, r1, r2, lsr #1
787 // CHECK: orreq.w r0, r2, r1 @ encoding: [0x42,0xea,0x01,0x00]
789 // CHECK: orreq r5, r1 @ encoding: [0x0d,0x43]
791 // CHECK: orreq r5, r1 @ encoding: [0x0d,0x43]
793 // CHECK: orreq.w r2, r2, r1 @ encoding: [0x42,0xea,0x01,0x02]
795 // CHECK: orreq.w r3, r1, r3 @ encoding: [0x41,0xea,0x03,0x03]
797 // CHECK: orrseq.w r4, r1, r4 @ encoding: [0x51,0xea,0x04,0x04]
799 // CHECK: orreq r7, r1 @ encoding: [0x0f,0x43]
801 // CHECK: orreq r7, r1 @ encoding: [0x0f,0x43]
803 // CHECK: orreq.w r8, r1, r8 @ encoding: [0x41,0xea,0x08,0x08]
805 // CHECK: orreq.w r8, r8, r1 @ encoding: [0x48,0xea,0x01,0x08]
811 // CHECK: orreq.w r2, r2, r1, lsl #1 @ encoding: [0x42,0xea,0x41,0x02]
813 // CHECK: orreq.w r2, r1, r2, lsr #1 @ encoding: [0x41,0xea,0x52,0x02]
818 BICS r3, r2, r1 // Must be wide - 3 distinct registers
819 BICS r2, r2, r1 // Should choose narrow
820 BICS r1, r2, r1 // Should choose wide - not commutative
821 BICS.W r2, r2, r1 // Explicitly wide
822 BICS.W r0, r1, r0
823 BIC r0, r1, r0 // Must use wide encoding as not flag-setting
824 BICS r7, r7, r1 // Should use narrow
825 BICS r8, r1, r8 // high registers so must use wide encoding
826 BICS r8, r8, r1
829 BICS r3, r3, r1, lsl #1 // Must use wide - shifted register
830 BICS r4, r1, r4, lsr #1
831 // CHECK: bics.w r3, r2, r1 @ encoding: [0x32,0xea,0x01,0x03]
832 // CHECK: bics r2, r1 @ encoding: [0x8a,0x43]
833 // CHECK: bics.w r1, r2, r1 @ encoding: [0x32,0xea,0x01,0x01]
834 // CHECK: bics.w r2, r2, r1 @ encoding: [0x32,0xea,0x01,0x02]
835 // CHECK: bics.w r0, r1, r0 @ encoding: [0x31,0xea,0x00,0x00]
836 // CHECK: bic.w r0, r1, r0 @ encoding: [0x21,0xea,0x00,0x00]
837 // CHECK: bics r7, r1 @ encoding: [0x8f,0x43]
838 // CHECK: bics.w r8, r1, r8 @ encoding: [0x31,0xea,0x08,0x08]
839 // CHECK: bics.w r8, r8, r1 @ encoding: [0x38,0xea,0x01,0x08]
842 // CHECK: bics.w r3, r3, r1, lsl #1 @ encoding: [0x33,0xea,0x41,0x03]
843 // CHECK: bics.w r4, r1, r4, lsr #1 @ encoding: [0x31,0xea,0x54,0x04]
846 BICEQ r0, r2, r1 // Must be wide - 3 distinct registers
848 BICEQ r5, r5, r1 // Should choose narrow
850 BICEQ r1, r5, r1 // Should choose wide - not commutative
852 BICEQ.W r4, r4, r1 // Explicitly wide
854 BICEQ.W r2, r1, r2
856 BICSEQ r5, r1, r5 // Must use wide encoding as flag-setting
858 BICEQ r7, r7, r1 // Should use narrow
860 BICEQ r8, r1, r8 // high registers so must use wide encoding
862 BICEQ r8, r8, r1
868 BICEQ r4, r4, r1, lsl #1 // Must use wide - shifted register
870 BICEQ r5, r1, r5, lsr #1
872 // CHECK: biceq.w r0, r2, r1 @ encoding: [0x22,0xea,0x01,0x00]
874 // CHECK: biceq r5, r1 @ encoding: [0x8d,0x43]
876 // CHECK: biceq.w r1, r5, r1 @ encoding: [0x25,0xea,0x01,0x01]
878 // CHECK: biceq.w r4, r4, r1 @ encoding: [0x24,0xea,0x01,0x04]
880 // CHECK: biceq.w r2, r1, r2 @ encoding: [0x21,0xea,0x02,0x02]
882 // CHECK: bicseq.w r5, r1, r5 @ encoding: [0x31,0xea,0x05,0x05]
884 // CHECK: biceq r7, r1 @ encoding: [0x8f,0x43]
886 // CHECK: biceq.w r8, r1, r8 @ encoding: [0x21,0xea,0x08,0x08]
888 // CHECK: biceq.w r8, r8, r1 @ encoding: [0x28,0xea,0x01,0x08]
894 // CHECK: biceq.w r4, r4, r1, lsl #1 @ encoding: [0x24,0xea,0x41,0x04]
896 // CHECK: biceq.w r5, r1, r5, lsr #1 @ encoding: [0x21,0xea,0x55,0x05]