Lines Matching refs:val
430 static inline uint32_t A5XX_CP_PROTECT_REG_BASE_ADDR(uint32_t val) in A5XX_CP_PROTECT_REG_BASE_ADDR() argument
432 return ((val) << A5XX_CP_PROTECT_REG_BASE_ADDR__SHIFT) & A5XX_CP_PROTECT_REG_BASE_ADDR__MASK; in A5XX_CP_PROTECT_REG_BASE_ADDR()
436 static inline uint32_t A5XX_CP_PROTECT_REG_MASK_LEN(uint32_t val) in A5XX_CP_PROTECT_REG_MASK_LEN() argument
438 return ((val) << A5XX_CP_PROTECT_REG_MASK_LEN__SHIFT) & A5XX_CP_PROTECT_REG_MASK_LEN__MASK; in A5XX_CP_PROTECT_REG_MASK_LEN()
1350 static inline uint32_t A5XX_VSC_BIN_SIZE_X(uint32_t val) in A5XX_VSC_BIN_SIZE_X() argument
1352 return ((val) << A5XX_VSC_BIN_SIZE_X__SHIFT) & A5XX_VSC_BIN_SIZE_X__MASK; in A5XX_VSC_BIN_SIZE_X()
1356 static inline uint32_t A5XX_VSC_BIN_SIZE_Y(uint32_t val) in A5XX_VSC_BIN_SIZE_Y() argument
1358 return ((val) << A5XX_VSC_BIN_SIZE_Y__SHIFT) & A5XX_VSC_BIN_SIZE_Y__MASK; in A5XX_VSC_BIN_SIZE_Y()
1971 static inline uint32_t A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ(uint32_t val) in A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ() argument
1973 …return ((val) << A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ__SHIFT) & A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HO… in A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ()
1977 static inline uint32_t A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT(uint32_t val) in A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT() argument
1979 …return ((val) << A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT__SHIFT) & A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VE… in A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT()
1985 static inline uint32_t A5XX_GRAS_CL_VPORT_XOFFSET_0(float val) in A5XX_GRAS_CL_VPORT_XOFFSET_0() argument
1987 return ((fui(val)) << A5XX_GRAS_CL_VPORT_XOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_XOFFSET_0__MASK; in A5XX_GRAS_CL_VPORT_XOFFSET_0()
1993 static inline uint32_t A5XX_GRAS_CL_VPORT_XSCALE_0(float val) in A5XX_GRAS_CL_VPORT_XSCALE_0() argument
1995 return ((fui(val)) << A5XX_GRAS_CL_VPORT_XSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_XSCALE_0__MASK; in A5XX_GRAS_CL_VPORT_XSCALE_0()
2001 static inline uint32_t A5XX_GRAS_CL_VPORT_YOFFSET_0(float val) in A5XX_GRAS_CL_VPORT_YOFFSET_0() argument
2003 return ((fui(val)) << A5XX_GRAS_CL_VPORT_YOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_YOFFSET_0__MASK; in A5XX_GRAS_CL_VPORT_YOFFSET_0()
2009 static inline uint32_t A5XX_GRAS_CL_VPORT_YSCALE_0(float val) in A5XX_GRAS_CL_VPORT_YSCALE_0() argument
2011 return ((fui(val)) << A5XX_GRAS_CL_VPORT_YSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_YSCALE_0__MASK; in A5XX_GRAS_CL_VPORT_YSCALE_0()
2017 static inline uint32_t A5XX_GRAS_CL_VPORT_ZOFFSET_0(float val) in A5XX_GRAS_CL_VPORT_ZOFFSET_0() argument
2019 return ((fui(val)) << A5XX_GRAS_CL_VPORT_ZOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_ZOFFSET_0__MASK; in A5XX_GRAS_CL_VPORT_ZOFFSET_0()
2025 static inline uint32_t A5XX_GRAS_CL_VPORT_ZSCALE_0(float val) in A5XX_GRAS_CL_VPORT_ZSCALE_0() argument
2027 return ((fui(val)) << A5XX_GRAS_CL_VPORT_ZSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_ZSCALE_0__MASK; in A5XX_GRAS_CL_VPORT_ZSCALE_0()
2036 static inline uint32_t A5XX_GRAS_SU_CNTL_LINEHALFWIDTH(float val) in A5XX_GRAS_SU_CNTL_LINEHALFWIDTH() argument
2038 …return ((((int32_t)(val * 4.0))) << A5XX_GRAS_SU_CNTL_LINEHALFWIDTH__SHIFT) & A5XX_GRAS_SU_CNTL_LI… in A5XX_GRAS_SU_CNTL_LINEHALFWIDTH()
2046 static inline uint32_t A5XX_GRAS_SU_POINT_MINMAX_MIN(float val) in A5XX_GRAS_SU_POINT_MINMAX_MIN() argument
2048 …return ((((uint32_t)(val * 16.0))) << A5XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT) & A5XX_GRAS_SU_POINT_M… in A5XX_GRAS_SU_POINT_MINMAX_MIN()
2052 static inline uint32_t A5XX_GRAS_SU_POINT_MINMAX_MAX(float val) in A5XX_GRAS_SU_POINT_MINMAX_MAX() argument
2054 …return ((((uint32_t)(val * 16.0))) << A5XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT) & A5XX_GRAS_SU_POINT_M… in A5XX_GRAS_SU_POINT_MINMAX_MAX()
2060 static inline uint32_t A5XX_GRAS_SU_POINT_SIZE(float val) in A5XX_GRAS_SU_POINT_SIZE() argument
2062 …return ((((int32_t)(val * 16.0))) << A5XX_GRAS_SU_POINT_SIZE__SHIFT) & A5XX_GRAS_SU_POINT_SIZE__MA… in A5XX_GRAS_SU_POINT_SIZE()
2074 static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_SCALE(float val) in A5XX_GRAS_SU_POLY_OFFSET_SCALE() argument
2076 …return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_SCALE__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_SCALE__MAS… in A5XX_GRAS_SU_POLY_OFFSET_SCALE()
2082 static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_OFFSET(float val) in A5XX_GRAS_SU_POLY_OFFSET_OFFSET() argument
2084 …return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_OFFSET__M… in A5XX_GRAS_SU_POLY_OFFSET_OFFSET()
2090 static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP(float val) in A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP() argument
2092 …return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_OFF… in A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP()
2098 static inline uint32_t A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT(enum a5xx_depth_format val) in A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT() argument
2100 …return ((val) << A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT__SHIFT) & A5XX_GRAS_SU_DEPTH_BUFFER_I… in A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT()
2113 static inline uint32_t A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) in A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES() argument
2115 …return ((val) << A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES__… in A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES()
2121 static inline uint32_t A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) in A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES() argument
2123 …return ((val) << A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES… in A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES()
2133 static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X(uint32_t val) in A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X() argument
2135 …return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X__… in A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X()
2139 static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y(uint32_t val) in A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y() argument
2141 …return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y__… in A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y()
2148 static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X(uint32_t val) in A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X() argument
2150 …return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X__… in A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X()
2154 static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y(uint32_t val) in A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y() argument
2156 …return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y__… in A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y()
2163 static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X(uint32_t val) in A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X() argument
2165 …return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0… in A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X()
2169 static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y(uint32_t val) in A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y() argument
2171 …return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0… in A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y()
2178 static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X(uint32_t val) in A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X() argument
2180 …return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0… in A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X()
2184 static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y(uint32_t val) in A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y() argument
2186 …return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0… in A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y()
2193 static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X(uint32_t val) in A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X() argument
2195 return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK; in A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X()
2199 static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(uint32_t val) in A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y() argument
2201 return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK; in A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()
2208 static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X(uint32_t val) in A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X() argument
2210 return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK; in A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X()
2214 static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(uint32_t val) in A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y() argument
2216 return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK; in A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()
2234 static inline uint32_t A5XX_RB_CNTL_WIDTH(uint32_t val) in A5XX_RB_CNTL_WIDTH() argument
2236 assert(!(val & 0x1f)); in A5XX_RB_CNTL_WIDTH()
2237 return ((val >> 5) << A5XX_RB_CNTL_WIDTH__SHIFT) & A5XX_RB_CNTL_WIDTH__MASK; in A5XX_RB_CNTL_WIDTH()
2241 static inline uint32_t A5XX_RB_CNTL_HEIGHT(uint32_t val) in A5XX_RB_CNTL_HEIGHT() argument
2243 assert(!(val & 0x1f)); in A5XX_RB_CNTL_HEIGHT()
2244 return ((val >> 5) << A5XX_RB_CNTL_HEIGHT__SHIFT) & A5XX_RB_CNTL_HEIGHT__MASK; in A5XX_RB_CNTL_HEIGHT()
2254 static inline uint32_t A5XX_RB_RENDER_CNTL_FLAG_MRTS(uint32_t val) in A5XX_RB_RENDER_CNTL_FLAG_MRTS() argument
2256 return ((val) << A5XX_RB_RENDER_CNTL_FLAG_MRTS__SHIFT) & A5XX_RB_RENDER_CNTL_FLAG_MRTS__MASK; in A5XX_RB_RENDER_CNTL_FLAG_MRTS()
2260 static inline uint32_t A5XX_RB_RENDER_CNTL_FLAG_MRTS2(uint32_t val) in A5XX_RB_RENDER_CNTL_FLAG_MRTS2() argument
2262 return ((val) << A5XX_RB_RENDER_CNTL_FLAG_MRTS2__SHIFT) & A5XX_RB_RENDER_CNTL_FLAG_MRTS2__MASK; in A5XX_RB_RENDER_CNTL_FLAG_MRTS2()
2268 static inline uint32_t A5XX_RB_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) in A5XX_RB_RAS_MSAA_CNTL_SAMPLES() argument
2270 return ((val) << A5XX_RB_RAS_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_RB_RAS_MSAA_CNTL_SAMPLES__MASK; in A5XX_RB_RAS_MSAA_CNTL_SAMPLES()
2276 static inline uint32_t A5XX_RB_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) in A5XX_RB_DEST_MSAA_CNTL_SAMPLES() argument
2278 return ((val) << A5XX_RB_DEST_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_RB_DEST_MSAA_CNTL_SAMPLES__MASK; in A5XX_RB_DEST_MSAA_CNTL_SAMPLES()
2296 static inline uint32_t A5XX_RB_FS_OUTPUT_CNTL_MRT(uint32_t val) in A5XX_RB_FS_OUTPUT_CNTL_MRT() argument
2298 return ((val) << A5XX_RB_FS_OUTPUT_CNTL_MRT__SHIFT) & A5XX_RB_FS_OUTPUT_CNTL_MRT__MASK; in A5XX_RB_FS_OUTPUT_CNTL_MRT()
2305 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT0(uint32_t val) in A5XX_RB_RENDER_COMPONENTS_RT0() argument
2307 return ((val) << A5XX_RB_RENDER_COMPONENTS_RT0__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT0__MASK; in A5XX_RB_RENDER_COMPONENTS_RT0()
2311 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT1(uint32_t val) in A5XX_RB_RENDER_COMPONENTS_RT1() argument
2313 return ((val) << A5XX_RB_RENDER_COMPONENTS_RT1__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT1__MASK; in A5XX_RB_RENDER_COMPONENTS_RT1()
2317 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT2(uint32_t val) in A5XX_RB_RENDER_COMPONENTS_RT2() argument
2319 return ((val) << A5XX_RB_RENDER_COMPONENTS_RT2__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT2__MASK; in A5XX_RB_RENDER_COMPONENTS_RT2()
2323 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT3(uint32_t val) in A5XX_RB_RENDER_COMPONENTS_RT3() argument
2325 return ((val) << A5XX_RB_RENDER_COMPONENTS_RT3__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT3__MASK; in A5XX_RB_RENDER_COMPONENTS_RT3()
2329 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT4(uint32_t val) in A5XX_RB_RENDER_COMPONENTS_RT4() argument
2331 return ((val) << A5XX_RB_RENDER_COMPONENTS_RT4__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT4__MASK; in A5XX_RB_RENDER_COMPONENTS_RT4()
2335 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT5(uint32_t val) in A5XX_RB_RENDER_COMPONENTS_RT5() argument
2337 return ((val) << A5XX_RB_RENDER_COMPONENTS_RT5__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT5__MASK; in A5XX_RB_RENDER_COMPONENTS_RT5()
2341 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT6(uint32_t val) in A5XX_RB_RENDER_COMPONENTS_RT6() argument
2343 return ((val) << A5XX_RB_RENDER_COMPONENTS_RT6__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT6__MASK; in A5XX_RB_RENDER_COMPONENTS_RT6()
2347 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT7(uint32_t val) in A5XX_RB_RENDER_COMPONENTS_RT7() argument
2349 return ((val) << A5XX_RB_RENDER_COMPONENTS_RT7__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT7__MASK; in A5XX_RB_RENDER_COMPONENTS_RT7()
2359 static inline uint32_t A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val) in A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE() argument
2361 …return ((val) << A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT) & A5XX_RB_MRT_CONTROL_COMPONENT_ENAB… in A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE()
2367 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(enum adreno_rb_blend_factor val) in A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR() argument
2369 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_RGB_… in A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()
2373 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a3xx_rb_blend_opcode val) in A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE() argument
2375 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_RG… in A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()
2379 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(enum adreno_rb_blend_factor val) in A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR() argument
2381 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_RGB… in A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()
2385 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(enum adreno_rb_blend_factor val) in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR() argument
2387 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_AL… in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()
2391 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a3xx_rb_blend_opcode val) in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE() argument
2393 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_… in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()
2397 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(enum adreno_rb_blend_factor val) in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR() argument
2399 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_A… in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()
2405 static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a5xx_color_fmt val) in A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT() argument
2407 …return ((val) << A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT) & A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MA… in A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT()
2411 static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(enum a5xx_tile_mode val) in A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE() argument
2413 …return ((val) << A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT) & A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MO… in A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()
2417 static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val) in A5XX_RB_MRT_BUF_INFO_COLOR_SWAP() argument
2419 return ((val) << A5XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT) & A5XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK; in A5XX_RB_MRT_BUF_INFO_COLOR_SWAP()
2426 static inline uint32_t A5XX_RB_MRT_PITCH(uint32_t val) in A5XX_RB_MRT_PITCH() argument
2428 assert(!(val & 0x3f)); in A5XX_RB_MRT_PITCH()
2429 return ((val >> 6) << A5XX_RB_MRT_PITCH__SHIFT) & A5XX_RB_MRT_PITCH__MASK; in A5XX_RB_MRT_PITCH()
2435 static inline uint32_t A5XX_RB_MRT_ARRAY_PITCH(uint32_t val) in A5XX_RB_MRT_ARRAY_PITCH() argument
2437 assert(!(val & 0x3f)); in A5XX_RB_MRT_ARRAY_PITCH()
2438 return ((val >> 6) << A5XX_RB_MRT_ARRAY_PITCH__SHIFT) & A5XX_RB_MRT_ARRAY_PITCH__MASK; in A5XX_RB_MRT_ARRAY_PITCH()
2448 static inline uint32_t A5XX_RB_BLEND_RED_UINT(uint32_t val) in A5XX_RB_BLEND_RED_UINT() argument
2450 return ((val) << A5XX_RB_BLEND_RED_UINT__SHIFT) & A5XX_RB_BLEND_RED_UINT__MASK; in A5XX_RB_BLEND_RED_UINT()
2454 static inline uint32_t A5XX_RB_BLEND_RED_SINT(uint32_t val) in A5XX_RB_BLEND_RED_SINT() argument
2456 return ((val) << A5XX_RB_BLEND_RED_SINT__SHIFT) & A5XX_RB_BLEND_RED_SINT__MASK; in A5XX_RB_BLEND_RED_SINT()
2460 static inline uint32_t A5XX_RB_BLEND_RED_FLOAT(float val) in A5XX_RB_BLEND_RED_FLOAT() argument
2462 …return ((util_float_to_half(val)) << A5XX_RB_BLEND_RED_FLOAT__SHIFT) & A5XX_RB_BLEND_RED_FLOAT__MA… in A5XX_RB_BLEND_RED_FLOAT()
2468 static inline uint32_t A5XX_RB_BLEND_RED_F32(float val) in A5XX_RB_BLEND_RED_F32() argument
2470 return ((fui(val)) << A5XX_RB_BLEND_RED_F32__SHIFT) & A5XX_RB_BLEND_RED_F32__MASK; in A5XX_RB_BLEND_RED_F32()
2476 static inline uint32_t A5XX_RB_BLEND_GREEN_UINT(uint32_t val) in A5XX_RB_BLEND_GREEN_UINT() argument
2478 return ((val) << A5XX_RB_BLEND_GREEN_UINT__SHIFT) & A5XX_RB_BLEND_GREEN_UINT__MASK; in A5XX_RB_BLEND_GREEN_UINT()
2482 static inline uint32_t A5XX_RB_BLEND_GREEN_SINT(uint32_t val) in A5XX_RB_BLEND_GREEN_SINT() argument
2484 return ((val) << A5XX_RB_BLEND_GREEN_SINT__SHIFT) & A5XX_RB_BLEND_GREEN_SINT__MASK; in A5XX_RB_BLEND_GREEN_SINT()
2488 static inline uint32_t A5XX_RB_BLEND_GREEN_FLOAT(float val) in A5XX_RB_BLEND_GREEN_FLOAT() argument
2490 …return ((util_float_to_half(val)) << A5XX_RB_BLEND_GREEN_FLOAT__SHIFT) & A5XX_RB_BLEND_GREEN_FLOAT… in A5XX_RB_BLEND_GREEN_FLOAT()
2496 static inline uint32_t A5XX_RB_BLEND_GREEN_F32(float val) in A5XX_RB_BLEND_GREEN_F32() argument
2498 return ((fui(val)) << A5XX_RB_BLEND_GREEN_F32__SHIFT) & A5XX_RB_BLEND_GREEN_F32__MASK; in A5XX_RB_BLEND_GREEN_F32()
2504 static inline uint32_t A5XX_RB_BLEND_BLUE_UINT(uint32_t val) in A5XX_RB_BLEND_BLUE_UINT() argument
2506 return ((val) << A5XX_RB_BLEND_BLUE_UINT__SHIFT) & A5XX_RB_BLEND_BLUE_UINT__MASK; in A5XX_RB_BLEND_BLUE_UINT()
2510 static inline uint32_t A5XX_RB_BLEND_BLUE_SINT(uint32_t val) in A5XX_RB_BLEND_BLUE_SINT() argument
2512 return ((val) << A5XX_RB_BLEND_BLUE_SINT__SHIFT) & A5XX_RB_BLEND_BLUE_SINT__MASK; in A5XX_RB_BLEND_BLUE_SINT()
2516 static inline uint32_t A5XX_RB_BLEND_BLUE_FLOAT(float val) in A5XX_RB_BLEND_BLUE_FLOAT() argument
2518 …return ((util_float_to_half(val)) << A5XX_RB_BLEND_BLUE_FLOAT__SHIFT) & A5XX_RB_BLEND_BLUE_FLOAT__… in A5XX_RB_BLEND_BLUE_FLOAT()
2524 static inline uint32_t A5XX_RB_BLEND_BLUE_F32(float val) in A5XX_RB_BLEND_BLUE_F32() argument
2526 return ((fui(val)) << A5XX_RB_BLEND_BLUE_F32__SHIFT) & A5XX_RB_BLEND_BLUE_F32__MASK; in A5XX_RB_BLEND_BLUE_F32()
2532 static inline uint32_t A5XX_RB_BLEND_ALPHA_UINT(uint32_t val) in A5XX_RB_BLEND_ALPHA_UINT() argument
2534 return ((val) << A5XX_RB_BLEND_ALPHA_UINT__SHIFT) & A5XX_RB_BLEND_ALPHA_UINT__MASK; in A5XX_RB_BLEND_ALPHA_UINT()
2538 static inline uint32_t A5XX_RB_BLEND_ALPHA_SINT(uint32_t val) in A5XX_RB_BLEND_ALPHA_SINT() argument
2540 return ((val) << A5XX_RB_BLEND_ALPHA_SINT__SHIFT) & A5XX_RB_BLEND_ALPHA_SINT__MASK; in A5XX_RB_BLEND_ALPHA_SINT()
2544 static inline uint32_t A5XX_RB_BLEND_ALPHA_FLOAT(float val) in A5XX_RB_BLEND_ALPHA_FLOAT() argument
2546 …return ((util_float_to_half(val)) << A5XX_RB_BLEND_ALPHA_FLOAT__SHIFT) & A5XX_RB_BLEND_ALPHA_FLOAT… in A5XX_RB_BLEND_ALPHA_FLOAT()
2552 static inline uint32_t A5XX_RB_BLEND_ALPHA_F32(float val) in A5XX_RB_BLEND_ALPHA_F32() argument
2554 return ((fui(val)) << A5XX_RB_BLEND_ALPHA_F32__SHIFT) & A5XX_RB_BLEND_ALPHA_F32__MASK; in A5XX_RB_BLEND_ALPHA_F32()
2560 static inline uint32_t A5XX_RB_ALPHA_CONTROL_ALPHA_REF(uint32_t val) in A5XX_RB_ALPHA_CONTROL_ALPHA_REF() argument
2562 return ((val) << A5XX_RB_ALPHA_CONTROL_ALPHA_REF__SHIFT) & A5XX_RB_ALPHA_CONTROL_ALPHA_REF__MASK; in A5XX_RB_ALPHA_CONTROL_ALPHA_REF()
2567 static inline uint32_t A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(enum adreno_compare_func val) in A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC() argument
2569 …return ((val) << A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__SHIFT) & A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_… in A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC()
2575 static inline uint32_t A5XX_RB_BLEND_CNTL_ENABLE_BLEND(uint32_t val) in A5XX_RB_BLEND_CNTL_ENABLE_BLEND() argument
2577 return ((val) << A5XX_RB_BLEND_CNTL_ENABLE_BLEND__SHIFT) & A5XX_RB_BLEND_CNTL_ENABLE_BLEND__MASK; in A5XX_RB_BLEND_CNTL_ENABLE_BLEND()
2582 static inline uint32_t A5XX_RB_BLEND_CNTL_SAMPLE_MASK(uint32_t val) in A5XX_RB_BLEND_CNTL_SAMPLE_MASK() argument
2584 return ((val) << A5XX_RB_BLEND_CNTL_SAMPLE_MASK__SHIFT) & A5XX_RB_BLEND_CNTL_SAMPLE_MASK__MASK; in A5XX_RB_BLEND_CNTL_SAMPLE_MASK()
2596 static inline uint32_t A5XX_RB_DEPTH_CNTL_ZFUNC(enum adreno_compare_func val) in A5XX_RB_DEPTH_CNTL_ZFUNC() argument
2598 return ((val) << A5XX_RB_DEPTH_CNTL_ZFUNC__SHIFT) & A5XX_RB_DEPTH_CNTL_ZFUNC__MASK; in A5XX_RB_DEPTH_CNTL_ZFUNC()
2605 static inline uint32_t A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT(enum a5xx_depth_format val) in A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT() argument
2607 …return ((val) << A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT__SHIFT) & A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_… in A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT()
2617 static inline uint32_t A5XX_RB_DEPTH_BUFFER_PITCH(uint32_t val) in A5XX_RB_DEPTH_BUFFER_PITCH() argument
2619 assert(!(val & 0x3f)); in A5XX_RB_DEPTH_BUFFER_PITCH()
2620 return ((val >> 6) << A5XX_RB_DEPTH_BUFFER_PITCH__SHIFT) & A5XX_RB_DEPTH_BUFFER_PITCH__MASK; in A5XX_RB_DEPTH_BUFFER_PITCH()
2626 static inline uint32_t A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH(uint32_t val) in A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH() argument
2628 assert(!(val & 0x3f)); in A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH()
2629 …return ((val >> 6) << A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH__SHIFT) & A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH_… in A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH()
2638 static inline uint32_t A5XX_RB_STENCIL_CONTROL_FUNC(enum adreno_compare_func val) in A5XX_RB_STENCIL_CONTROL_FUNC() argument
2640 return ((val) << A5XX_RB_STENCIL_CONTROL_FUNC__SHIFT) & A5XX_RB_STENCIL_CONTROL_FUNC__MASK; in A5XX_RB_STENCIL_CONTROL_FUNC()
2644 static inline uint32_t A5XX_RB_STENCIL_CONTROL_FAIL(enum adreno_stencil_op val) in A5XX_RB_STENCIL_CONTROL_FAIL() argument
2646 return ((val) << A5XX_RB_STENCIL_CONTROL_FAIL__SHIFT) & A5XX_RB_STENCIL_CONTROL_FAIL__MASK; in A5XX_RB_STENCIL_CONTROL_FAIL()
2650 static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZPASS(enum adreno_stencil_op val) in A5XX_RB_STENCIL_CONTROL_ZPASS() argument
2652 return ((val) << A5XX_RB_STENCIL_CONTROL_ZPASS__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZPASS__MASK; in A5XX_RB_STENCIL_CONTROL_ZPASS()
2656 static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZFAIL(enum adreno_stencil_op val) in A5XX_RB_STENCIL_CONTROL_ZFAIL() argument
2658 return ((val) << A5XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZFAIL__MASK; in A5XX_RB_STENCIL_CONTROL_ZFAIL()
2662 static inline uint32_t A5XX_RB_STENCIL_CONTROL_FUNC_BF(enum adreno_compare_func val) in A5XX_RB_STENCIL_CONTROL_FUNC_BF() argument
2664 return ((val) << A5XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_FUNC_BF__MASK; in A5XX_RB_STENCIL_CONTROL_FUNC_BF()
2668 static inline uint32_t A5XX_RB_STENCIL_CONTROL_FAIL_BF(enum adreno_stencil_op val) in A5XX_RB_STENCIL_CONTROL_FAIL_BF() argument
2670 return ((val) << A5XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_FAIL_BF__MASK; in A5XX_RB_STENCIL_CONTROL_FAIL_BF()
2674 static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZPASS_BF(enum adreno_stencil_op val) in A5XX_RB_STENCIL_CONTROL_ZPASS_BF() argument
2676 return ((val) << A5XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK; in A5XX_RB_STENCIL_CONTROL_ZPASS_BF()
2680 static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZFAIL_BF(enum adreno_stencil_op val) in A5XX_RB_STENCIL_CONTROL_ZFAIL_BF() argument
2682 return ((val) << A5XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK; in A5XX_RB_STENCIL_CONTROL_ZFAIL_BF()
2695 static inline uint32_t A5XX_RB_STENCIL_PITCH(uint32_t val) in A5XX_RB_STENCIL_PITCH() argument
2697 assert(!(val & 0x3f)); in A5XX_RB_STENCIL_PITCH()
2698 return ((val >> 6) << A5XX_RB_STENCIL_PITCH__SHIFT) & A5XX_RB_STENCIL_PITCH__MASK; in A5XX_RB_STENCIL_PITCH()
2704 static inline uint32_t A5XX_RB_STENCIL_ARRAY_PITCH(uint32_t val) in A5XX_RB_STENCIL_ARRAY_PITCH() argument
2706 assert(!(val & 0x3f)); in A5XX_RB_STENCIL_ARRAY_PITCH()
2707 return ((val >> 6) << A5XX_RB_STENCIL_ARRAY_PITCH__SHIFT) & A5XX_RB_STENCIL_ARRAY_PITCH__MASK; in A5XX_RB_STENCIL_ARRAY_PITCH()
2713 static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILREF(uint32_t val) in A5XX_RB_STENCILREFMASK_STENCILREF() argument
2715 …return ((val) << A5XX_RB_STENCILREFMASK_STENCILREF__SHIFT) & A5XX_RB_STENCILREFMASK_STENCILREF__MA… in A5XX_RB_STENCILREFMASK_STENCILREF()
2719 static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val) in A5XX_RB_STENCILREFMASK_STENCILMASK() argument
2721 …return ((val) << A5XX_RB_STENCILREFMASK_STENCILMASK__SHIFT) & A5XX_RB_STENCILREFMASK_STENCILMASK__… in A5XX_RB_STENCILREFMASK_STENCILMASK()
2725 static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val) in A5XX_RB_STENCILREFMASK_STENCILWRITEMASK() argument
2727 …return ((val) << A5XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT) & A5XX_RB_STENCILREFMASK_STENCILW… in A5XX_RB_STENCILREFMASK_STENCILWRITEMASK()
2736 static inline uint32_t A5XX_RB_WINDOW_OFFSET_X(uint32_t val) in A5XX_RB_WINDOW_OFFSET_X() argument
2738 return ((val) << A5XX_RB_WINDOW_OFFSET_X__SHIFT) & A5XX_RB_WINDOW_OFFSET_X__MASK; in A5XX_RB_WINDOW_OFFSET_X()
2742 static inline uint32_t A5XX_RB_WINDOW_OFFSET_Y(uint32_t val) in A5XX_RB_WINDOW_OFFSET_Y() argument
2744 return ((val) << A5XX_RB_WINDOW_OFFSET_Y__SHIFT) & A5XX_RB_WINDOW_OFFSET_Y__MASK; in A5XX_RB_WINDOW_OFFSET_Y()
2750 static inline uint32_t A5XX_RB_BLIT_CNTL_BUF(enum a5xx_blit_buf val) in A5XX_RB_BLIT_CNTL_BUF() argument
2752 return ((val) << A5XX_RB_BLIT_CNTL_BUF__SHIFT) & A5XX_RB_BLIT_CNTL_BUF__MASK; in A5XX_RB_BLIT_CNTL_BUF()
2759 static inline uint32_t A5XX_RB_RESOLVE_CNTL_1_X(uint32_t val) in A5XX_RB_RESOLVE_CNTL_1_X() argument
2761 return ((val) << A5XX_RB_RESOLVE_CNTL_1_X__SHIFT) & A5XX_RB_RESOLVE_CNTL_1_X__MASK; in A5XX_RB_RESOLVE_CNTL_1_X()
2765 static inline uint32_t A5XX_RB_RESOLVE_CNTL_1_Y(uint32_t val) in A5XX_RB_RESOLVE_CNTL_1_Y() argument
2767 return ((val) << A5XX_RB_RESOLVE_CNTL_1_Y__SHIFT) & A5XX_RB_RESOLVE_CNTL_1_Y__MASK; in A5XX_RB_RESOLVE_CNTL_1_Y()
2774 static inline uint32_t A5XX_RB_RESOLVE_CNTL_2_X(uint32_t val) in A5XX_RB_RESOLVE_CNTL_2_X() argument
2776 return ((val) << A5XX_RB_RESOLVE_CNTL_2_X__SHIFT) & A5XX_RB_RESOLVE_CNTL_2_X__MASK; in A5XX_RB_RESOLVE_CNTL_2_X()
2780 static inline uint32_t A5XX_RB_RESOLVE_CNTL_2_Y(uint32_t val) in A5XX_RB_RESOLVE_CNTL_2_Y() argument
2782 return ((val) << A5XX_RB_RESOLVE_CNTL_2_Y__SHIFT) & A5XX_RB_RESOLVE_CNTL_2_Y__MASK; in A5XX_RB_RESOLVE_CNTL_2_Y()
2794 static inline uint32_t A5XX_RB_BLIT_DST_PITCH(uint32_t val) in A5XX_RB_BLIT_DST_PITCH() argument
2796 assert(!(val & 0x3f)); in A5XX_RB_BLIT_DST_PITCH()
2797 return ((val >> 6) << A5XX_RB_BLIT_DST_PITCH__SHIFT) & A5XX_RB_BLIT_DST_PITCH__MASK; in A5XX_RB_BLIT_DST_PITCH()
2803 static inline uint32_t A5XX_RB_BLIT_DST_ARRAY_PITCH(uint32_t val) in A5XX_RB_BLIT_DST_ARRAY_PITCH() argument
2805 assert(!(val & 0x3f)); in A5XX_RB_BLIT_DST_ARRAY_PITCH()
2806 return ((val >> 6) << A5XX_RB_BLIT_DST_ARRAY_PITCH__SHIFT) & A5XX_RB_BLIT_DST_ARRAY_PITCH__MASK; in A5XX_RB_BLIT_DST_ARRAY_PITCH()
2821 static inline uint32_t A5XX_RB_CLEAR_CNTL_MASK(uint32_t val) in A5XX_RB_CLEAR_CNTL_MASK() argument
2823 return ((val) << A5XX_RB_CLEAR_CNTL_MASK__SHIFT) & A5XX_RB_CLEAR_CNTL_MASK__MASK; in A5XX_RB_CLEAR_CNTL_MASK()
2841 static inline uint32_t A5XX_RB_MRT_FLAG_BUFFER_PITCH(uint32_t val) in A5XX_RB_MRT_FLAG_BUFFER_PITCH() argument
2843 assert(!(val & 0x3f)); in A5XX_RB_MRT_FLAG_BUFFER_PITCH()
2844 return ((val >> 6) << A5XX_RB_MRT_FLAG_BUFFER_PITCH__SHIFT) & A5XX_RB_MRT_FLAG_BUFFER_PITCH__MASK; in A5XX_RB_MRT_FLAG_BUFFER_PITCH()
2850 static inline uint32_t A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH(uint32_t val) in A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH() argument
2852 assert(!(val & 0x3f)); in A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH()
2853 …return ((val >> 6) << A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH__SHIFT) & A5XX_RB_MRT_FLAG_BUFFER_ARRAY_… in A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH()
2863 static inline uint32_t A5XX_RB_BLIT_FLAG_DST_PITCH(uint32_t val) in A5XX_RB_BLIT_FLAG_DST_PITCH() argument
2865 assert(!(val & 0x3f)); in A5XX_RB_BLIT_FLAG_DST_PITCH()
2866 return ((val >> 6) << A5XX_RB_BLIT_FLAG_DST_PITCH__SHIFT) & A5XX_RB_BLIT_FLAG_DST_PITCH__MASK; in A5XX_RB_BLIT_FLAG_DST_PITCH()
2872 static inline uint32_t A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH(uint32_t val) in A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH() argument
2874 assert(!(val & 0x3f)); in A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH()
2875 …return ((val >> 6) << A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH__SHIFT) & A5XX_RB_BLIT_FLAG_DST_ARRAY_PITC… in A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH()
2881 static inline uint32_t A5XX_VPC_CNTL_0_STRIDE_IN_VPC(uint32_t val) in A5XX_VPC_CNTL_0_STRIDE_IN_VPC() argument
2883 return ((val) << A5XX_VPC_CNTL_0_STRIDE_IN_VPC__SHIFT) & A5XX_VPC_CNTL_0_STRIDE_IN_VPC__MASK; in A5XX_VPC_CNTL_0_STRIDE_IN_VPC()
2910 static inline uint32_t A5XX_VPC_PACK_NUMNONPOSVAR(uint32_t val) in A5XX_VPC_PACK_NUMNONPOSVAR() argument
2912 return ((val) << A5XX_VPC_PACK_NUMNONPOSVAR__SHIFT) & A5XX_VPC_PACK_NUMNONPOSVAR__MASK; in A5XX_VPC_PACK_NUMNONPOSVAR()
2916 static inline uint32_t A5XX_VPC_PACK_PSIZELOC(uint32_t val) in A5XX_VPC_PACK_PSIZELOC() argument
2918 return ((val) << A5XX_VPC_PACK_PSIZELOC__SHIFT) & A5XX_VPC_PACK_PSIZELOC__MASK; in A5XX_VPC_PACK_PSIZELOC()
2939 static inline uint32_t A5XX_VPC_SO_PROG_A_BUF(uint32_t val) in A5XX_VPC_SO_PROG_A_BUF() argument
2941 return ((val) << A5XX_VPC_SO_PROG_A_BUF__SHIFT) & A5XX_VPC_SO_PROG_A_BUF__MASK; in A5XX_VPC_SO_PROG_A_BUF()
2945 static inline uint32_t A5XX_VPC_SO_PROG_A_OFF(uint32_t val) in A5XX_VPC_SO_PROG_A_OFF() argument
2947 assert(!(val & 0x3)); in A5XX_VPC_SO_PROG_A_OFF()
2948 return ((val >> 2) << A5XX_VPC_SO_PROG_A_OFF__SHIFT) & A5XX_VPC_SO_PROG_A_OFF__MASK; in A5XX_VPC_SO_PROG_A_OFF()
2953 static inline uint32_t A5XX_VPC_SO_PROG_B_BUF(uint32_t val) in A5XX_VPC_SO_PROG_B_BUF() argument
2955 return ((val) << A5XX_VPC_SO_PROG_B_BUF__SHIFT) & A5XX_VPC_SO_PROG_B_BUF__MASK; in A5XX_VPC_SO_PROG_B_BUF()
2959 static inline uint32_t A5XX_VPC_SO_PROG_B_OFF(uint32_t val) in A5XX_VPC_SO_PROG_B_OFF() argument
2961 assert(!(val & 0x3)); in A5XX_VPC_SO_PROG_B_OFF()
2962 return ((val >> 2) << A5XX_VPC_SO_PROG_B_OFF__SHIFT) & A5XX_VPC_SO_PROG_B_OFF__MASK; in A5XX_VPC_SO_PROG_B_OFF()
2985 static inline uint32_t A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC(uint32_t val) in A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC() argument
2987 …return ((val) << A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC__SHIFT) & A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_V… in A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC()
3010 static inline uint32_t A5XX_VFD_CONTROL_0_VTXCNT(uint32_t val) in A5XX_VFD_CONTROL_0_VTXCNT() argument
3012 return ((val) << A5XX_VFD_CONTROL_0_VTXCNT__SHIFT) & A5XX_VFD_CONTROL_0_VTXCNT__MASK; in A5XX_VFD_CONTROL_0_VTXCNT()
3018 static inline uint32_t A5XX_VFD_CONTROL_1_REGID4VTX(uint32_t val) in A5XX_VFD_CONTROL_1_REGID4VTX() argument
3020 return ((val) << A5XX_VFD_CONTROL_1_REGID4VTX__SHIFT) & A5XX_VFD_CONTROL_1_REGID4VTX__MASK; in A5XX_VFD_CONTROL_1_REGID4VTX()
3024 static inline uint32_t A5XX_VFD_CONTROL_1_REGID4INST(uint32_t val) in A5XX_VFD_CONTROL_1_REGID4INST() argument
3026 return ((val) << A5XX_VFD_CONTROL_1_REGID4INST__SHIFT) & A5XX_VFD_CONTROL_1_REGID4INST__MASK; in A5XX_VFD_CONTROL_1_REGID4INST()
3056 static inline uint32_t A5XX_VFD_DECODE_INSTR_IDX(uint32_t val) in A5XX_VFD_DECODE_INSTR_IDX() argument
3058 return ((val) << A5XX_VFD_DECODE_INSTR_IDX__SHIFT) & A5XX_VFD_DECODE_INSTR_IDX__MASK; in A5XX_VFD_DECODE_INSTR_IDX()
3063 static inline uint32_t A5XX_VFD_DECODE_INSTR_FORMAT(enum a5xx_vtx_fmt val) in A5XX_VFD_DECODE_INSTR_FORMAT() argument
3065 return ((val) << A5XX_VFD_DECODE_INSTR_FORMAT__SHIFT) & A5XX_VFD_DECODE_INSTR_FORMAT__MASK; in A5XX_VFD_DECODE_INSTR_FORMAT()
3077 static inline uint32_t A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK(uint32_t val) in A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK() argument
3079 …return ((val) << A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK__SHIFT) & A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK__… in A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK()
3083 static inline uint32_t A5XX_VFD_DEST_CNTL_INSTR_REGID(uint32_t val) in A5XX_VFD_DEST_CNTL_INSTR_REGID() argument
3085 return ((val) << A5XX_VFD_DEST_CNTL_INSTR_REGID__SHIFT) & A5XX_VFD_DEST_CNTL_INSTR_REGID__MASK; in A5XX_VFD_DEST_CNTL_INSTR_REGID()
3096 static inline uint32_t A5XX_SP_VS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) in A5XX_SP_VS_CONTROL_REG_CONSTOBJECTOFFSET() argument
3098 …return ((val) << A5XX_SP_VS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_VS_CONTROL_REG_CONSTOB… in A5XX_SP_VS_CONTROL_REG_CONSTOBJECTOFFSET()
3102 static inline uint32_t A5XX_SP_VS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) in A5XX_SP_VS_CONTROL_REG_SHADEROBJOFFSET() argument
3104 …return ((val) << A5XX_SP_VS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_VS_CONTROL_REG_SHADEROBJ… in A5XX_SP_VS_CONTROL_REG_SHADEROBJOFFSET()
3111 static inline uint32_t A5XX_SP_FS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) in A5XX_SP_FS_CONTROL_REG_CONSTOBJECTOFFSET() argument
3113 …return ((val) << A5XX_SP_FS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_FS_CONTROL_REG_CONSTOB… in A5XX_SP_FS_CONTROL_REG_CONSTOBJECTOFFSET()
3117 static inline uint32_t A5XX_SP_FS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) in A5XX_SP_FS_CONTROL_REG_SHADEROBJOFFSET() argument
3119 …return ((val) << A5XX_SP_FS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_FS_CONTROL_REG_SHADEROBJ… in A5XX_SP_FS_CONTROL_REG_SHADEROBJOFFSET()
3126 static inline uint32_t A5XX_SP_HS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) in A5XX_SP_HS_CONTROL_REG_CONSTOBJECTOFFSET() argument
3128 …return ((val) << A5XX_SP_HS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_HS_CONTROL_REG_CONSTOB… in A5XX_SP_HS_CONTROL_REG_CONSTOBJECTOFFSET()
3132 static inline uint32_t A5XX_SP_HS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) in A5XX_SP_HS_CONTROL_REG_SHADEROBJOFFSET() argument
3134 …return ((val) << A5XX_SP_HS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_HS_CONTROL_REG_SHADEROBJ… in A5XX_SP_HS_CONTROL_REG_SHADEROBJOFFSET()
3141 static inline uint32_t A5XX_SP_DS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) in A5XX_SP_DS_CONTROL_REG_CONSTOBJECTOFFSET() argument
3143 …return ((val) << A5XX_SP_DS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_DS_CONTROL_REG_CONSTOB… in A5XX_SP_DS_CONTROL_REG_CONSTOBJECTOFFSET()
3147 static inline uint32_t A5XX_SP_DS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) in A5XX_SP_DS_CONTROL_REG_SHADEROBJOFFSET() argument
3149 …return ((val) << A5XX_SP_DS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_DS_CONTROL_REG_SHADEROBJ… in A5XX_SP_DS_CONTROL_REG_SHADEROBJOFFSET()
3156 static inline uint32_t A5XX_SP_GS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) in A5XX_SP_GS_CONTROL_REG_CONSTOBJECTOFFSET() argument
3158 …return ((val) << A5XX_SP_GS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_GS_CONTROL_REG_CONSTOB… in A5XX_SP_GS_CONTROL_REG_CONSTOBJECTOFFSET()
3162 static inline uint32_t A5XX_SP_GS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) in A5XX_SP_GS_CONTROL_REG_SHADEROBJOFFSET() argument
3164 …return ((val) << A5XX_SP_GS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_GS_CONTROL_REG_SHADEROBJ… in A5XX_SP_GS_CONTROL_REG_SHADEROBJOFFSET()
3176 static inline uint32_t A5XX_SP_VS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) in A5XX_SP_VS_CTRL_REG0_THREADSIZE() argument
3178 return ((val) << A5XX_SP_VS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_VS_CTRL_REG0_THREADSIZE__MASK; in A5XX_SP_VS_CTRL_REG0_THREADSIZE()
3182 static inline uint32_t A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) in A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT() argument
3184 …return ((val) << A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_VS_CTRL_REG0_HALFREGFOOTP… in A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()
3188 static inline uint32_t A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) in A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT() argument
3190 …return ((val) << A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_VS_CTRL_REG0_FULLREGFOOTP… in A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()
3196 static inline uint32_t A5XX_SP_VS_CTRL_REG0_BRANCHSTACK(uint32_t val) in A5XX_SP_VS_CTRL_REG0_BRANCHSTACK() argument
3198 return ((val) << A5XX_SP_VS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_VS_CTRL_REG0_BRANCHSTACK__MASK; in A5XX_SP_VS_CTRL_REG0_BRANCHSTACK()
3204 static inline uint32_t A5XX_SP_PRIMITIVE_CNTL_VSOUT(uint32_t val) in A5XX_SP_PRIMITIVE_CNTL_VSOUT() argument
3206 return ((val) << A5XX_SP_PRIMITIVE_CNTL_VSOUT__SHIFT) & A5XX_SP_PRIMITIVE_CNTL_VSOUT__MASK; in A5XX_SP_PRIMITIVE_CNTL_VSOUT()
3214 static inline uint32_t A5XX_SP_VS_OUT_REG_A_REGID(uint32_t val) in A5XX_SP_VS_OUT_REG_A_REGID() argument
3216 return ((val) << A5XX_SP_VS_OUT_REG_A_REGID__SHIFT) & A5XX_SP_VS_OUT_REG_A_REGID__MASK; in A5XX_SP_VS_OUT_REG_A_REGID()
3220 static inline uint32_t A5XX_SP_VS_OUT_REG_A_COMPMASK(uint32_t val) in A5XX_SP_VS_OUT_REG_A_COMPMASK() argument
3222 return ((val) << A5XX_SP_VS_OUT_REG_A_COMPMASK__SHIFT) & A5XX_SP_VS_OUT_REG_A_COMPMASK__MASK; in A5XX_SP_VS_OUT_REG_A_COMPMASK()
3226 static inline uint32_t A5XX_SP_VS_OUT_REG_B_REGID(uint32_t val) in A5XX_SP_VS_OUT_REG_B_REGID() argument
3228 return ((val) << A5XX_SP_VS_OUT_REG_B_REGID__SHIFT) & A5XX_SP_VS_OUT_REG_B_REGID__MASK; in A5XX_SP_VS_OUT_REG_B_REGID()
3232 static inline uint32_t A5XX_SP_VS_OUT_REG_B_COMPMASK(uint32_t val) in A5XX_SP_VS_OUT_REG_B_COMPMASK() argument
3234 return ((val) << A5XX_SP_VS_OUT_REG_B_COMPMASK__SHIFT) & A5XX_SP_VS_OUT_REG_B_COMPMASK__MASK; in A5XX_SP_VS_OUT_REG_B_COMPMASK()
3242 static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC0(uint32_t val) in A5XX_SP_VS_VPC_DST_REG_OUTLOC0() argument
3244 return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC0__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC0__MASK; in A5XX_SP_VS_VPC_DST_REG_OUTLOC0()
3248 static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC1(uint32_t val) in A5XX_SP_VS_VPC_DST_REG_OUTLOC1() argument
3250 return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC1__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC1__MASK; in A5XX_SP_VS_VPC_DST_REG_OUTLOC1()
3254 static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC2(uint32_t val) in A5XX_SP_VS_VPC_DST_REG_OUTLOC2() argument
3256 return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC2__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC2__MASK; in A5XX_SP_VS_VPC_DST_REG_OUTLOC2()
3260 static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC3(uint32_t val) in A5XX_SP_VS_VPC_DST_REG_OUTLOC3() argument
3262 return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC3__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC3__MASK; in A5XX_SP_VS_VPC_DST_REG_OUTLOC3()
3274 static inline uint32_t A5XX_SP_FS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) in A5XX_SP_FS_CTRL_REG0_THREADSIZE() argument
3276 return ((val) << A5XX_SP_FS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_FS_CTRL_REG0_THREADSIZE__MASK; in A5XX_SP_FS_CTRL_REG0_THREADSIZE()
3280 static inline uint32_t A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) in A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT() argument
3282 …return ((val) << A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_FS_CTRL_REG0_HALFREGFOOTP… in A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()
3286 static inline uint32_t A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) in A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT() argument
3288 …return ((val) << A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_FS_CTRL_REG0_FULLREGFOOTP… in A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()
3294 static inline uint32_t A5XX_SP_FS_CTRL_REG0_BRANCHSTACK(uint32_t val) in A5XX_SP_FS_CTRL_REG0_BRANCHSTACK() argument
3296 return ((val) << A5XX_SP_FS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_FS_CTRL_REG0_BRANCHSTACK__MASK; in A5XX_SP_FS_CTRL_REG0_BRANCHSTACK()
3310 static inline uint32_t A5XX_SP_FS_OUTPUT_CNTL_MRT(uint32_t val) in A5XX_SP_FS_OUTPUT_CNTL_MRT() argument
3312 return ((val) << A5XX_SP_FS_OUTPUT_CNTL_MRT__SHIFT) & A5XX_SP_FS_OUTPUT_CNTL_MRT__MASK; in A5XX_SP_FS_OUTPUT_CNTL_MRT()
3316 static inline uint32_t A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID(uint32_t val) in A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID() argument
3318 …return ((val) << A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID__SHIFT) & A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID__… in A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID()
3322 static inline uint32_t A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID(uint32_t val) in A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID() argument
3324 …return ((val) << A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID__SHIFT) & A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMA… in A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID()
3332 static inline uint32_t A5XX_SP_FS_OUTPUT_REG_REGID(uint32_t val) in A5XX_SP_FS_OUTPUT_REG_REGID() argument
3334 return ((val) << A5XX_SP_FS_OUTPUT_REG_REGID__SHIFT) & A5XX_SP_FS_OUTPUT_REG_REGID__MASK; in A5XX_SP_FS_OUTPUT_REG_REGID()
3343 static inline uint32_t A5XX_SP_FS_MRT_REG_COLOR_FORMAT(enum a5xx_color_fmt val) in A5XX_SP_FS_MRT_REG_COLOR_FORMAT() argument
3345 return ((val) << A5XX_SP_FS_MRT_REG_COLOR_FORMAT__SHIFT) & A5XX_SP_FS_MRT_REG_COLOR_FORMAT__MASK; in A5XX_SP_FS_MRT_REG_COLOR_FORMAT()
3360 static inline uint32_t A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) in A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES() argument
3362 …return ((val) << A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES__… in A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES()
3368 static inline uint32_t A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) in A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES() argument
3370 …return ((val) << A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES… in A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES()
3403 static inline uint32_t A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(enum a3xx_threadsize val) in A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE() argument
3405 …return ((val) << A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__SHIFT) & A5XX_HLSQ_CONTROL_0_REG_FSTHREADSI… in A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()
3411 static inline uint32_t A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD(uint32_t val) in A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD() argument
3413 …return ((val) << A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD__SHIFT) & A5XX_HLSQ_CONTROL_1_REG_PRIM… in A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD()
3419 static inline uint32_t A5XX_HLSQ_CONTROL_2_REG_FACEREGID(uint32_t val) in A5XX_HLSQ_CONTROL_2_REG_FACEREGID() argument
3421 …return ((val) << A5XX_HLSQ_CONTROL_2_REG_FACEREGID__SHIFT) & A5XX_HLSQ_CONTROL_2_REG_FACEREGID__MA… in A5XX_HLSQ_CONTROL_2_REG_FACEREGID()
3427 static inline uint32_t A5XX_HLSQ_CONTROL_3_REG_FRAGCOORDXYREGID(uint32_t val) in A5XX_HLSQ_CONTROL_3_REG_FRAGCOORDXYREGID() argument
3429 …return ((val) << A5XX_HLSQ_CONTROL_3_REG_FRAGCOORDXYREGID__SHIFT) & A5XX_HLSQ_CONTROL_3_REG_FRAGCO… in A5XX_HLSQ_CONTROL_3_REG_FRAGCOORDXYREGID()
3435 static inline uint32_t A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID(uint32_t val) in A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID() argument
3437 …return ((val) << A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID__SHIFT) & A5XX_HLSQ_CONTROL_4_REG_XYCOORDREG… in A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID()
3441 static inline uint32_t A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID(uint32_t val) in A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID() argument
3443 …return ((val) << A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID__SHIFT) & A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREG… in A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID()
3452 static inline uint32_t A5XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) in A5XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET() argument
3454 …return ((val) << A5XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_VS_CONTROL_REG_CON… in A5XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET()
3458 static inline uint32_t A5XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) in A5XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET() argument
3460 …return ((val) << A5XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_VS_CONTROL_REG_SHADE… in A5XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET()
3467 static inline uint32_t A5XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) in A5XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET() argument
3469 …return ((val) << A5XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_FS_CONTROL_REG_CON… in A5XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET()
3473 static inline uint32_t A5XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) in A5XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET() argument
3475 …return ((val) << A5XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_FS_CONTROL_REG_SHADE… in A5XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET()
3482 static inline uint32_t A5XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) in A5XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET() argument
3484 …return ((val) << A5XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_HS_CONTROL_REG_CON… in A5XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET()
3488 static inline uint32_t A5XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) in A5XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET() argument
3490 …return ((val) << A5XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_HS_CONTROL_REG_SHADE… in A5XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET()
3497 static inline uint32_t A5XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) in A5XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET() argument
3499 …return ((val) << A5XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_DS_CONTROL_REG_CON… in A5XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET()
3503 static inline uint32_t A5XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) in A5XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET() argument
3505 …return ((val) << A5XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_DS_CONTROL_REG_SHADE… in A5XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET()
3512 static inline uint32_t A5XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) in A5XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET() argument
3514 …return ((val) << A5XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_GS_CONTROL_REG_CON… in A5XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET()
3518 static inline uint32_t A5XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) in A5XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET() argument
3520 …return ((val) << A5XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_GS_CONTROL_REG_SHADE… in A5XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET()
3528 static inline uint32_t A5XX_HLSQ_VS_CNTL_INSTRLEN(uint32_t val) in A5XX_HLSQ_VS_CNTL_INSTRLEN() argument
3530 return ((val) << A5XX_HLSQ_VS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_VS_CNTL_INSTRLEN__MASK; in A5XX_HLSQ_VS_CNTL_INSTRLEN()
3536 static inline uint32_t A5XX_HLSQ_FS_CNTL_INSTRLEN(uint32_t val) in A5XX_HLSQ_FS_CNTL_INSTRLEN() argument
3538 return ((val) << A5XX_HLSQ_FS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_FS_CNTL_INSTRLEN__MASK; in A5XX_HLSQ_FS_CNTL_INSTRLEN()
3544 static inline uint32_t A5XX_HLSQ_HS_CNTL_INSTRLEN(uint32_t val) in A5XX_HLSQ_HS_CNTL_INSTRLEN() argument
3546 return ((val) << A5XX_HLSQ_HS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_HS_CNTL_INSTRLEN__MASK; in A5XX_HLSQ_HS_CNTL_INSTRLEN()
3552 static inline uint32_t A5XX_HLSQ_DS_CNTL_INSTRLEN(uint32_t val) in A5XX_HLSQ_DS_CNTL_INSTRLEN() argument
3554 return ((val) << A5XX_HLSQ_DS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_DS_CNTL_INSTRLEN__MASK; in A5XX_HLSQ_DS_CNTL_INSTRLEN()
3560 static inline uint32_t A5XX_HLSQ_GS_CNTL_INSTRLEN(uint32_t val) in A5XX_HLSQ_GS_CNTL_INSTRLEN() argument
3562 return ((val) << A5XX_HLSQ_GS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_GS_CNTL_INSTRLEN__MASK; in A5XX_HLSQ_GS_CNTL_INSTRLEN()
3568 static inline uint32_t A5XX_HLSQ_CS_CNTL_INSTRLEN(uint32_t val) in A5XX_HLSQ_CS_CNTL_INSTRLEN() argument
3570 return ((val) << A5XX_HLSQ_CS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_CS_CNTL_INSTRLEN__MASK; in A5XX_HLSQ_CS_CNTL_INSTRLEN()
3644 static inline uint32_t A5XX_RB_2D_SRC_INFO_COLOR_FORMAT(enum a5xx_color_fmt val) in A5XX_RB_2D_SRC_INFO_COLOR_FORMAT() argument
3646 return ((val) << A5XX_RB_2D_SRC_INFO_COLOR_FORMAT__SHIFT) & A5XX_RB_2D_SRC_INFO_COLOR_FORMAT__MASK; in A5XX_RB_2D_SRC_INFO_COLOR_FORMAT()
3650 static inline uint32_t A5XX_RB_2D_SRC_INFO_COLOR_SWAP(enum a3xx_color_swap val) in A5XX_RB_2D_SRC_INFO_COLOR_SWAP() argument
3652 return ((val) << A5XX_RB_2D_SRC_INFO_COLOR_SWAP__SHIFT) & A5XX_RB_2D_SRC_INFO_COLOR_SWAP__MASK; in A5XX_RB_2D_SRC_INFO_COLOR_SWAP()
3662 static inline uint32_t A5XX_RB_2D_SRC_SIZE_PITCH(uint32_t val) in A5XX_RB_2D_SRC_SIZE_PITCH() argument
3664 assert(!(val & 0x3f)); in A5XX_RB_2D_SRC_SIZE_PITCH()
3665 return ((val >> 6) << A5XX_RB_2D_SRC_SIZE_PITCH__SHIFT) & A5XX_RB_2D_SRC_SIZE_PITCH__MASK; in A5XX_RB_2D_SRC_SIZE_PITCH()
3669 static inline uint32_t A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH(uint32_t val) in A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH() argument
3671 assert(!(val & 0x3f)); in A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH()
3672 …return ((val >> 6) << A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH__SHIFT) & A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH__M… in A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH()
3678 static inline uint32_t A5XX_RB_2D_DST_INFO_COLOR_FORMAT(enum a5xx_color_fmt val) in A5XX_RB_2D_DST_INFO_COLOR_FORMAT() argument
3680 return ((val) << A5XX_RB_2D_DST_INFO_COLOR_FORMAT__SHIFT) & A5XX_RB_2D_DST_INFO_COLOR_FORMAT__MASK; in A5XX_RB_2D_DST_INFO_COLOR_FORMAT()
3684 static inline uint32_t A5XX_RB_2D_DST_INFO_COLOR_SWAP(enum a3xx_color_swap val) in A5XX_RB_2D_DST_INFO_COLOR_SWAP() argument
3686 return ((val) << A5XX_RB_2D_DST_INFO_COLOR_SWAP__SHIFT) & A5XX_RB_2D_DST_INFO_COLOR_SWAP__MASK; in A5XX_RB_2D_DST_INFO_COLOR_SWAP()
3696 static inline uint32_t A5XX_RB_2D_DST_SIZE_PITCH(uint32_t val) in A5XX_RB_2D_DST_SIZE_PITCH() argument
3698 assert(!(val & 0x3f)); in A5XX_RB_2D_DST_SIZE_PITCH()
3699 return ((val >> 6) << A5XX_RB_2D_DST_SIZE_PITCH__SHIFT) & A5XX_RB_2D_DST_SIZE_PITCH__MASK; in A5XX_RB_2D_DST_SIZE_PITCH()
3703 static inline uint32_t A5XX_RB_2D_DST_SIZE_ARRAY_PITCH(uint32_t val) in A5XX_RB_2D_DST_SIZE_ARRAY_PITCH() argument
3705 assert(!(val & 0x3f)); in A5XX_RB_2D_DST_SIZE_ARRAY_PITCH()
3706 …return ((val >> 6) << A5XX_RB_2D_DST_SIZE_ARRAY_PITCH__SHIFT) & A5XX_RB_2D_DST_SIZE_ARRAY_PITCH__M… in A5XX_RB_2D_DST_SIZE_ARRAY_PITCH()
3720 static inline uint32_t A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT(enum a5xx_color_fmt val) in A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT() argument
3722 …return ((val) << A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT__SHIFT) & A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT__… in A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT()
3726 static inline uint32_t A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP(enum a3xx_color_swap val) in A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP() argument
3728 return ((val) << A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP__SHIFT) & A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP__MASK; in A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP()
3734 static inline uint32_t A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT(enum a5xx_color_fmt val) in A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT() argument
3736 …return ((val) << A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT__SHIFT) & A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT__… in A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT()
3740 static inline uint32_t A5XX_GRAS_2D_DST_INFO_COLOR_SWAP(enum a3xx_color_swap val) in A5XX_GRAS_2D_DST_INFO_COLOR_SWAP() argument
3742 return ((val) << A5XX_GRAS_2D_DST_INFO_COLOR_SWAP__SHIFT) & A5XX_GRAS_2D_DST_INFO_COLOR_SWAP__MASK; in A5XX_GRAS_2D_DST_INFO_COLOR_SWAP()
3755 static inline uint32_t A5XX_TEX_SAMP_0_XY_MAG(enum a5xx_tex_filter val) in A5XX_TEX_SAMP_0_XY_MAG() argument
3757 return ((val) << A5XX_TEX_SAMP_0_XY_MAG__SHIFT) & A5XX_TEX_SAMP_0_XY_MAG__MASK; in A5XX_TEX_SAMP_0_XY_MAG()
3761 static inline uint32_t A5XX_TEX_SAMP_0_XY_MIN(enum a5xx_tex_filter val) in A5XX_TEX_SAMP_0_XY_MIN() argument
3763 return ((val) << A5XX_TEX_SAMP_0_XY_MIN__SHIFT) & A5XX_TEX_SAMP_0_XY_MIN__MASK; in A5XX_TEX_SAMP_0_XY_MIN()
3767 static inline uint32_t A5XX_TEX_SAMP_0_WRAP_S(enum a5xx_tex_clamp val) in A5XX_TEX_SAMP_0_WRAP_S() argument
3769 return ((val) << A5XX_TEX_SAMP_0_WRAP_S__SHIFT) & A5XX_TEX_SAMP_0_WRAP_S__MASK; in A5XX_TEX_SAMP_0_WRAP_S()
3773 static inline uint32_t A5XX_TEX_SAMP_0_WRAP_T(enum a5xx_tex_clamp val) in A5XX_TEX_SAMP_0_WRAP_T() argument
3775 return ((val) << A5XX_TEX_SAMP_0_WRAP_T__SHIFT) & A5XX_TEX_SAMP_0_WRAP_T__MASK; in A5XX_TEX_SAMP_0_WRAP_T()
3779 static inline uint32_t A5XX_TEX_SAMP_0_WRAP_R(enum a5xx_tex_clamp val) in A5XX_TEX_SAMP_0_WRAP_R() argument
3781 return ((val) << A5XX_TEX_SAMP_0_WRAP_R__SHIFT) & A5XX_TEX_SAMP_0_WRAP_R__MASK; in A5XX_TEX_SAMP_0_WRAP_R()
3785 static inline uint32_t A5XX_TEX_SAMP_0_ANISO(enum a5xx_tex_aniso val) in A5XX_TEX_SAMP_0_ANISO() argument
3787 return ((val) << A5XX_TEX_SAMP_0_ANISO__SHIFT) & A5XX_TEX_SAMP_0_ANISO__MASK; in A5XX_TEX_SAMP_0_ANISO()
3791 static inline uint32_t A5XX_TEX_SAMP_0_LOD_BIAS(float val) in A5XX_TEX_SAMP_0_LOD_BIAS() argument
3793 …return ((((int32_t)(val * 256.0))) << A5XX_TEX_SAMP_0_LOD_BIAS__SHIFT) & A5XX_TEX_SAMP_0_LOD_BIAS_… in A5XX_TEX_SAMP_0_LOD_BIAS()
3799 static inline uint32_t A5XX_TEX_SAMP_1_COMPARE_FUNC(enum adreno_compare_func val) in A5XX_TEX_SAMP_1_COMPARE_FUNC() argument
3801 return ((val) << A5XX_TEX_SAMP_1_COMPARE_FUNC__SHIFT) & A5XX_TEX_SAMP_1_COMPARE_FUNC__MASK; in A5XX_TEX_SAMP_1_COMPARE_FUNC()
3808 static inline uint32_t A5XX_TEX_SAMP_1_MAX_LOD(float val) in A5XX_TEX_SAMP_1_MAX_LOD() argument
3810 …return ((((uint32_t)(val * 256.0))) << A5XX_TEX_SAMP_1_MAX_LOD__SHIFT) & A5XX_TEX_SAMP_1_MAX_LOD__… in A5XX_TEX_SAMP_1_MAX_LOD()
3814 static inline uint32_t A5XX_TEX_SAMP_1_MIN_LOD(float val) in A5XX_TEX_SAMP_1_MIN_LOD() argument
3816 …return ((((uint32_t)(val * 256.0))) << A5XX_TEX_SAMP_1_MIN_LOD__SHIFT) & A5XX_TEX_SAMP_1_MIN_LOD__… in A5XX_TEX_SAMP_1_MIN_LOD()
3822 static inline uint32_t A5XX_TEX_SAMP_2_BCOLOR_OFFSET(uint32_t val) in A5XX_TEX_SAMP_2_BCOLOR_OFFSET() argument
3824 return ((val) << A5XX_TEX_SAMP_2_BCOLOR_OFFSET__SHIFT) & A5XX_TEX_SAMP_2_BCOLOR_OFFSET__MASK; in A5XX_TEX_SAMP_2_BCOLOR_OFFSET()
3832 static inline uint32_t A5XX_TEX_CONST_0_TILE_MODE(enum a5xx_tile_mode val) in A5XX_TEX_CONST_0_TILE_MODE() argument
3834 return ((val) << A5XX_TEX_CONST_0_TILE_MODE__SHIFT) & A5XX_TEX_CONST_0_TILE_MODE__MASK; in A5XX_TEX_CONST_0_TILE_MODE()
3839 static inline uint32_t A5XX_TEX_CONST_0_SWIZ_X(enum a5xx_tex_swiz val) in A5XX_TEX_CONST_0_SWIZ_X() argument
3841 return ((val) << A5XX_TEX_CONST_0_SWIZ_X__SHIFT) & A5XX_TEX_CONST_0_SWIZ_X__MASK; in A5XX_TEX_CONST_0_SWIZ_X()
3845 static inline uint32_t A5XX_TEX_CONST_0_SWIZ_Y(enum a5xx_tex_swiz val) in A5XX_TEX_CONST_0_SWIZ_Y() argument
3847 return ((val) << A5XX_TEX_CONST_0_SWIZ_Y__SHIFT) & A5XX_TEX_CONST_0_SWIZ_Y__MASK; in A5XX_TEX_CONST_0_SWIZ_Y()
3851 static inline uint32_t A5XX_TEX_CONST_0_SWIZ_Z(enum a5xx_tex_swiz val) in A5XX_TEX_CONST_0_SWIZ_Z() argument
3853 return ((val) << A5XX_TEX_CONST_0_SWIZ_Z__SHIFT) & A5XX_TEX_CONST_0_SWIZ_Z__MASK; in A5XX_TEX_CONST_0_SWIZ_Z()
3857 static inline uint32_t A5XX_TEX_CONST_0_SWIZ_W(enum a5xx_tex_swiz val) in A5XX_TEX_CONST_0_SWIZ_W() argument
3859 return ((val) << A5XX_TEX_CONST_0_SWIZ_W__SHIFT) & A5XX_TEX_CONST_0_SWIZ_W__MASK; in A5XX_TEX_CONST_0_SWIZ_W()
3863 static inline uint32_t A5XX_TEX_CONST_0_MIPLVLS(uint32_t val) in A5XX_TEX_CONST_0_MIPLVLS() argument
3865 return ((val) << A5XX_TEX_CONST_0_MIPLVLS__SHIFT) & A5XX_TEX_CONST_0_MIPLVLS__MASK; in A5XX_TEX_CONST_0_MIPLVLS()
3869 static inline uint32_t A5XX_TEX_CONST_0_FMT(enum a5xx_tex_fmt val) in A5XX_TEX_CONST_0_FMT() argument
3871 return ((val) << A5XX_TEX_CONST_0_FMT__SHIFT) & A5XX_TEX_CONST_0_FMT__MASK; in A5XX_TEX_CONST_0_FMT()
3875 static inline uint32_t A5XX_TEX_CONST_0_SWAP(enum a3xx_color_swap val) in A5XX_TEX_CONST_0_SWAP() argument
3877 return ((val) << A5XX_TEX_CONST_0_SWAP__SHIFT) & A5XX_TEX_CONST_0_SWAP__MASK; in A5XX_TEX_CONST_0_SWAP()
3883 static inline uint32_t A5XX_TEX_CONST_1_WIDTH(uint32_t val) in A5XX_TEX_CONST_1_WIDTH() argument
3885 return ((val) << A5XX_TEX_CONST_1_WIDTH__SHIFT) & A5XX_TEX_CONST_1_WIDTH__MASK; in A5XX_TEX_CONST_1_WIDTH()
3889 static inline uint32_t A5XX_TEX_CONST_1_HEIGHT(uint32_t val) in A5XX_TEX_CONST_1_HEIGHT() argument
3891 return ((val) << A5XX_TEX_CONST_1_HEIGHT__SHIFT) & A5XX_TEX_CONST_1_HEIGHT__MASK; in A5XX_TEX_CONST_1_HEIGHT()
3897 static inline uint32_t A5XX_TEX_CONST_2_FETCHSIZE(enum a5xx_tex_fetchsize val) in A5XX_TEX_CONST_2_FETCHSIZE() argument
3899 return ((val) << A5XX_TEX_CONST_2_FETCHSIZE__SHIFT) & A5XX_TEX_CONST_2_FETCHSIZE__MASK; in A5XX_TEX_CONST_2_FETCHSIZE()
3903 static inline uint32_t A5XX_TEX_CONST_2_PITCH(uint32_t val) in A5XX_TEX_CONST_2_PITCH() argument
3905 return ((val) << A5XX_TEX_CONST_2_PITCH__SHIFT) & A5XX_TEX_CONST_2_PITCH__MASK; in A5XX_TEX_CONST_2_PITCH()
3909 static inline uint32_t A5XX_TEX_CONST_2_TYPE(enum a5xx_tex_type val) in A5XX_TEX_CONST_2_TYPE() argument
3911 return ((val) << A5XX_TEX_CONST_2_TYPE__SHIFT) & A5XX_TEX_CONST_2_TYPE__MASK; in A5XX_TEX_CONST_2_TYPE()
3917 static inline uint32_t A5XX_TEX_CONST_3_ARRAY_PITCH(uint32_t val) in A5XX_TEX_CONST_3_ARRAY_PITCH() argument
3919 assert(!(val & 0xfff)); in A5XX_TEX_CONST_3_ARRAY_PITCH()
3920 return ((val >> 12) << A5XX_TEX_CONST_3_ARRAY_PITCH__SHIFT) & A5XX_TEX_CONST_3_ARRAY_PITCH__MASK; in A5XX_TEX_CONST_3_ARRAY_PITCH()
3927 static inline uint32_t A5XX_TEX_CONST_4_BASE_LO(uint32_t val) in A5XX_TEX_CONST_4_BASE_LO() argument
3929 assert(!(val & 0x1f)); in A5XX_TEX_CONST_4_BASE_LO()
3930 return ((val >> 5) << A5XX_TEX_CONST_4_BASE_LO__SHIFT) & A5XX_TEX_CONST_4_BASE_LO__MASK; in A5XX_TEX_CONST_4_BASE_LO()
3936 static inline uint32_t A5XX_TEX_CONST_5_BASE_HI(uint32_t val) in A5XX_TEX_CONST_5_BASE_HI() argument
3938 return ((val) << A5XX_TEX_CONST_5_BASE_HI__SHIFT) & A5XX_TEX_CONST_5_BASE_HI__MASK; in A5XX_TEX_CONST_5_BASE_HI()
3942 static inline uint32_t A5XX_TEX_CONST_5_DEPTH(uint32_t val) in A5XX_TEX_CONST_5_DEPTH() argument
3944 return ((val) << A5XX_TEX_CONST_5_DEPTH__SHIFT) & A5XX_TEX_CONST_5_DEPTH__MASK; in A5XX_TEX_CONST_5_DEPTH()