Lines Matching refs:GENX
38 anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) { in emit_lrm()
47 anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_IMM), lri) { in emit_lri()
65 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in genX()
71 anv_batch_emit(&cmd_buffer->batch, GENX(STATE_BASE_ADDRESS), sba) { in genX()
73 sba.GeneralStateMemoryObjectControlState = GENX(MOCS); in genX()
78 sba.SurfaceStateMemoryObjectControlState = GENX(MOCS); in genX()
83 sba.DynamicStateMemoryObjectControlState = GENX(MOCS); in genX()
87 sba.IndirectObjectMemoryObjectControlState = GENX(MOCS); in genX()
92 sba.InstructionMemoryObjectControlState = GENX(MOCS); in genX()
148 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in genX()
474 struct GENX(RENDER_SURFACE_STATE) null_ss = { in genX()
488 GENX(RENDER_SURFACE_STATE_pack)(NULL, state->null_surface_state.map, in genX()
711 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in genX()
731 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in genX()
742 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in genX()
753 anv_pack_struct(&l3cr, GENX(L3CNTLREG), in genX()
761 emit_lri(&cmd_buffer->batch, GENX(L3CNTLREG_num), l3cr); in genX()
789 anv_pack_struct(&l3sqcr1, GENX(L3SQCREG1), in genX()
799 anv_pack_struct(&l3cr2, GENX(L3CNTLREG2), in genX()
809 anv_pack_struct(&l3cr3, GENX(L3CNTLREG3), in genX()
818 emit_lri(&cmd_buffer->batch, GENX(L3SQCREG1_num), l3sqcr1); in genX()
819 emit_lri(&cmd_buffer->batch, GENX(L3CNTLREG2_num), l3cr2); in genX()
820 emit_lri(&cmd_buffer->batch, GENX(L3CNTLREG3_num), l3cr3); in genX()
828 anv_pack_struct(&scratch1, GENX(SCRATCH1), in genX()
830 anv_pack_struct(&chicken3, GENX(CHICKEN3), in genX()
833 emit_lri(&cmd_buffer->batch, GENX(SCRATCH1_num), scratch1); in genX()
834 emit_lri(&cmd_buffer->batch, GENX(CHICKEN3_num), chicken3); in genX()
865 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pipe) { in genX()
900 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pipe) { in genX()
1047 GENX(3DSTATE_PUSH_CONSTANT_ALLOC_VS), alloc) { in cmd_buffer_alloc_push_constants()
1056 GENX(3DSTATE_PUSH_CONSTANT_ALLOC_PS), alloc) { in cmd_buffer_alloc_push_constants()
1393 GENX(3DSTATE_SAMPLER_STATE_POINTERS_VS), ssp) { in cmd_buffer_emit_descriptor_pointers()
1402 GENX(3DSTATE_BINDING_TABLE_POINTERS_VS), btp) { in cmd_buffer_emit_descriptor_pointers()
1430 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CONSTANT_VS), c) in cmd_buffer_flush_push_constants()
1433 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CONSTANT_VS), c) { in cmd_buffer_flush_push_constants()
1435 c.ConstantBody = (struct GENX(3DSTATE_CONSTANT_BODY)) { in cmd_buffer_flush_push_constants()
1474 GENX(3DSTATE_VERTEX_BUFFERS)); in genX()
1480 struct GENX(VERTEX_BUFFER_STATE) state = { in genX()
1484 .MemoryObjectControlState = GENX(MOCS), in genX()
1488 .VertexBufferMemoryObjectControlState = GENX(MOCS), in genX()
1502 GENX(VERTEX_BUFFER_STATE_pack)(&cmd_buffer->batch, &p[1 + i * 4], &state); in genX()
1537 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in genX()
1598 GENX(3DSTATE_VERTEX_BUFFERS)); in emit_base_vertex_instance_bo()
1600 GENX(VERTEX_BUFFER_STATE_pack)(&cmd_buffer->batch, p + 1, in emit_base_vertex_instance_bo()
1601 &(struct GENX(VERTEX_BUFFER_STATE)) { in emit_base_vertex_instance_bo()
1606 .MemoryObjectControlState = GENX(MOCS), in emit_base_vertex_instance_bo()
1610 .VertexBufferMemoryObjectControlState = GENX(MOCS), in emit_base_vertex_instance_bo()
1650 anv_batch_emit(&cmd_buffer->batch, GENX(3DPRIMITIVE), prim) { in genX()
1678 anv_batch_emit(&cmd_buffer->batch, GENX(3DPRIMITIVE), prim) { in genX()
1722 anv_batch_emit(&cmd_buffer->batch, GENX(3DPRIMITIVE), prim) { in genX()
1755 anv_batch_emit(&cmd_buffer->batch, GENX(3DPRIMITIVE), prim) { in genX()
1787 uint32_t iface_desc_data_dw[GENX(INTERFACE_DESCRIPTOR_DATA_length)]; in flush_compute_descriptor_set()
1788 struct GENX(INTERFACE_DESCRIPTOR_DATA) desc = { in flush_compute_descriptor_set()
1792 GENX(INTERFACE_DESCRIPTOR_DATA_pack)(NULL, iface_desc_data_dw, &desc); in flush_compute_descriptor_set()
1797 GENX(INTERFACE_DESCRIPTOR_DATA_length), in flush_compute_descriptor_set()
1800 uint32_t size = GENX(INTERFACE_DESCRIPTOR_DATA_length) * sizeof(uint32_t); in flush_compute_descriptor_set()
1802 GENX(MEDIA_INTERFACE_DESCRIPTOR_LOAD), mid) { in flush_compute_descriptor_set()
1850 anv_batch_emit(&cmd_buffer->batch, GENX(MEDIA_CURBE_LOAD), curbe) { in genX()
1907 anv_batch_emit(&cmd_buffer->batch, GENX(GPGPU_WALKER), ggw) { in genX()
1919 anv_batch_emit(&cmd_buffer->batch, GENX(MEDIA_STATE_FLUSH), msf); in genX()
1971 anv_batch_emit(batch, GENX(MI_PREDICATE), mip) { in genX()
1981 anv_batch_emit(batch, GENX(MI_PREDICATE), mip) { in genX()
1991 anv_batch_emit(batch, GENX(MI_PREDICATE), mip) { in genX()
1999 anv_batch_emit(batch, GENX(MI_PREDICATE), mip) { in genX()
2006 anv_batch_emit(batch, GENX(GPGPU_WALKER), ggw) { in genX()
2017 anv_batch_emit(batch, GENX(MEDIA_STATE_FLUSH), msf); in genX()
2035 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CC_STATE_POINTERS), t); in flush_pipeline_before_pipeline_select()
2048 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in flush_pipeline_before_pipeline_select()
2056 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in flush_pipeline_before_pipeline_select()
2071 anv_batch_emit(&cmd_buffer->batch, GENX(PIPELINE_SELECT), ps) { in genX()
2088 anv_batch_emit(&cmd_buffer->batch, GENX(PIPELINE_SELECT), ps) { in genX()
2117 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pipe) { in genX()
2120 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pipe) { in genX()
2123 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pipe) { in genX()
2195 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_DEPTH_BUFFER), db) { in cmd_buffer_emit_depth_stencil()
2209 db.DepthBufferObjectControlState = GENX(MOCS); in cmd_buffer_emit_depth_stencil()
2246 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_DEPTH_BUFFER), db) { in cmd_buffer_emit_depth_stencil()
2261 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_HIER_DEPTH_BUFFER), hdb) { in cmd_buffer_emit_depth_stencil()
2262 hdb.HierarchicalDepthBufferObjectControlState = GENX(MOCS); in cmd_buffer_emit_depth_stencil()
2287 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_HIER_DEPTH_BUFFER), hdb); in cmd_buffer_emit_depth_stencil()
2292 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_STENCIL_BUFFER), sb) { in cmd_buffer_emit_depth_stencil()
2296 sb.StencilBufferObjectControlState = GENX(MOCS); in cmd_buffer_emit_depth_stencil()
2309 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_STENCIL_BUFFER), sb); in cmd_buffer_emit_depth_stencil()
2324 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CLEAR_PARAMS), cp) { in cmd_buffer_emit_depth_stencil()
2435 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in emit_ps_depth_count()
2450 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in emit_query_availability()
2471 anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_DATA_IMM), sdm) { in genX()
2505 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in genX()
2562 anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_REGISTER_MEM), srm) { in genX()
2566 anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_REGISTER_MEM), srm) { in genX()
2574 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in genX()
2626 anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) { in emit_load_alu_reg_u64()
2630 anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) { in emit_load_alu_reg_u64()
2640 anv_batch_emit(batch, GENX(MI_STORE_REGISTER_MEM), srm) { in store_query_result()
2646 anv_batch_emit(batch, GENX(MI_STORE_REGISTER_MEM), srm) { in store_query_result()
2669 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in genX()
2688 uint32_t *dw = anv_batch_emitn(&cmd_buffer->batch, 5, GENX(MI_MATH)); in genX()