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Lines Matching refs:BrCond

118       SmallVector<MachineOperand, 4> BrCond;  member
430 if (!TII->ReverseBranchCondition(BBI.BrCond)) { in ReverseBranchCondition()
432 TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl); in ReverseBranchCondition()
492 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty()) in ValidTriangle()
627 BBI.BrCond.clear(); in ScanInstructions()
629 !TII->AnalyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond); in ScanInstructions()
632 if (BBI.BrCond.size()) { in ScanInstructions()
720 if (BBI.BrCond.size()) { in FeasibilityAnalysis()
726 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); in FeasibilityAnalysis()
756 if (!BBI.IsBrAnalyzable || BBI.BrCond.empty() || BBI.IsDone) { in AnalyzeBlock()
785 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in AnalyzeBlock()
802 FeasibilityAnalysis(TrueBBI, BBI.BrCond) && in AnalyzeBlock()
820 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true)) { in AnalyzeBlock()
835 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true, true)) { in AnalyzeBlock()
843 FeasibilityAnalysis(TrueBBI, BBI.BrCond)) { in AnalyzeBlock()
1024 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); in IfConvertSimple()
1097 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); in IfConvertTriangle()
1155 SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(), in IfConvertTriangle()
1156 CvtBBI->BrCond.end()); in IfConvertTriangle()
1228 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in IfConvertDiamond()
1231 SmallVector<MachineOperand, 4> *Cond1 = &BBI.BrCond; in IfConvertDiamond()