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Lines Matching refs:BASE

77 	outw(RX_DISABLE, BASE + VX_COMMAND);  in t595_reset()
78 outw(RX_DISCARD_TOP_PACK, BASE + VX_COMMAND); in t595_reset()
80 outw(TX_DISABLE, BASE + VX_COMMAND); in t595_reset()
81 outw(STOP_TRANSCEIVER, BASE + VX_COMMAND); in t595_reset()
83 outw(RX_RESET, BASE + VX_COMMAND); in t595_reset()
85 outw(TX_RESET, BASE + VX_COMMAND); in t595_reset()
87 outw(C_INTR_LATCH, BASE + VX_COMMAND); in t595_reset()
88 outw(SET_RD_0_MASK, BASE + VX_COMMAND); in t595_reset()
89 outw(SET_INTR_MASK, BASE + VX_COMMAND); in t595_reset()
90 outw(SET_RX_FILTER, BASE + VX_COMMAND); in t595_reset()
112 outb(nic->node_addr[i], BASE + VX_W2_ADDR_0 + i); in t595_reset()
114 outw(RX_RESET, BASE + VX_COMMAND); in t595_reset()
116 outw(TX_RESET, BASE + VX_COMMAND); in t595_reset()
122 inb(BASE + VX_W1_TX_STATUS); in t595_reset()
125 S_TX_COMPLETE | S_TX_AVAIL, BASE + VX_COMMAND); in t595_reset()
127 S_TX_COMPLETE | S_TX_AVAIL, BASE + VX_COMMAND); in t595_reset()
136 outw(ACK_INTR | 0xff, BASE + VX_COMMAND); in t595_reset()
139 FIL_BRDCST|FIL_MULTICAST, BASE + VX_COMMAND); in t595_reset()
154 outw(RX_ENABLE, BASE + VX_COMMAND); in t595_reset()
155 outw(TX_ENABLE, BASE + VX_COMMAND); in t595_reset()
196 while(( status=inb(BASE + VX_W1_TX_STATUS) )& TXS_COMPLETE ) { in t595_transmit()
198 outw(TX_RESET, BASE + VX_COMMAND); in t595_transmit()
199 outw(TX_ENABLE, BASE + VX_COMMAND); in t595_transmit()
202 outb(0x0, BASE + VX_W1_TX_STATUS); in t595_transmit()
205 while (inw(BASE + VX_W1_FREE_TX) < len + pad + 4) { in t595_transmit()
209 outw(len, BASE + VX_W1_TX_PIO_WR_1); in t595_transmit()
210 outw(0x0, BASE + VX_W1_TX_PIO_WR_1); /* Second dword meaningless */ in t595_transmit()
213 outsw(BASE + VX_W1_TX_PIO_WR_1, d, ETH_ALEN/2); in t595_transmit()
214 outsw(BASE + VX_W1_TX_PIO_WR_1, nic->node_addr, ETH_ALEN/2); in t595_transmit()
215 outw(t, BASE + VX_W1_TX_PIO_WR_1); in t595_transmit()
216 outsw(BASE + VX_W1_TX_PIO_WR_1, p, s / 2); in t595_transmit()
218 outb(*(p+s - 1), BASE + VX_W1_TX_PIO_WR_1); in t595_transmit()
221 outb(0, BASE + VX_W1_TX_PIO_WR_1); /* Padding */ in t595_transmit()
224 while((inw(BASE + VX_STATUS) & S_COMMAND_IN_PROGRESS) != 0) in t595_transmit()
238 cst=inw(BASE + VX_STATUS); in t595_poll()
247 outw(ACK_INTR | cst, BASE + VX_COMMAND); in t595_poll()
248 outw(C_INTR_LATCH, BASE + VX_COMMAND); in t595_poll()
253 status = inw(BASE + VX_W1_RX_STATUS); in t595_poll()
259 outw(RX_DISCARD_TOP_PACK, BASE + VX_COMMAND); in t595_poll()
273 insw(BASE + VX_W1_RX_PIO_RD_1, nic->packet, rx_fifo / 2); in t595_poll()
275 nic->packet[rx_fifo-1]=inb(BASE + VX_W1_RX_PIO_RD_1); in t595_poll()
279 status = inw(BASE + VX_W1_RX_STATUS); in t595_poll()
286 insw(BASE + VX_W1_RX_PIO_RD_1, nic->packet+nic->packetlen, rx_fifo / 2); in t595_poll()
288 nic->packet[nic->packetlen+rx_fifo-1]=inb(BASE + VX_W1_RX_PIO_RD_1); in t595_poll()
304 outw(RX_DISCARD_TOP_PACK, BASE + VX_COMMAND); in t595_poll()
305 while (inw(BASE + VX_STATUS) & S_COMMAND_IN_PROGRESS); in t595_poll()
330 for (i = 0; is_eeprom_busy(BASE) && i < MAX_EEPROMBUSY; i++) in eeprom_rdy()
350 outw(EEPROM_CMD_RD | offset, BASE + VX_W0_EEPROM_COMMAND);
353 return (inw(BASE + VX_W0_EEPROM_DATA));
362 vx_connectors = inw(BASE + VX_W3_RESET_OPT) & 0x7f; in vxgetlink()
377 vx_connector = (inl(BASE + VX_W3_INTERNAL_CFG) in vxgetlink()
417 j = inl(BASE + VX_W3_INTERNAL_CFG) & ~INTERNAL_CONNECTOR_MASK; in vxsetlink()
418 outl(j | (i <<INTERNAL_CONNECTOR_BITS), BASE + VX_W3_INTERNAL_CFG); in vxsetlink()
421 outw(STOP_TRANSCEIVER, BASE + VX_COMMAND); in vxsetlink()
424 outw(0, BASE + VX_W4_MEDIA_TYPE); in vxsetlink()
430 outw(ENABLE_UTP, BASE + VX_W4_MEDIA_TYPE); in vxsetlink()
433 outw(START_TRANSCEIVER,BASE + VX_COMMAND); in vxsetlink()
439 outw(LINKBEAT_ENABLE, BASE + VX_W4_MEDIA_TYPE); in vxsetlink()
451 outw(STOP_TRANSCEIVER, BASE + VX_COMMAND); in t595_disable()
454 outw(0, BASE + VX_W4_MEDIA_TYPE); in t595_disable()
486 outw(GLOBAL_RESET, BASE + VX_COMMAND); in t595_probe()
506 outw(ntohs(p[i]), BASE + VX_W2_ADDR_0 + (i * 2)); in t595_probe()