Lines Matching refs:phyreg
723 u32 control_1000, status_1000, phyreg; in update_linkspeed() local
815 phyreg = readl(base + NvRegRandomSeed); in update_linkspeed()
816 phyreg &= ~(0x3FF00); in update_linkspeed()
818 phyreg |= NVREG_RNDSEED_FORCE3; in update_linkspeed()
820 phyreg |= NVREG_RNDSEED_FORCE2; in update_linkspeed()
822 phyreg |= NVREG_RNDSEED_FORCE; in update_linkspeed()
823 writel(phyreg, base + NvRegRandomSeed); in update_linkspeed()
826 phyreg = readl(base + NvRegPhyInterface); in update_linkspeed()
827 phyreg &= ~(PHY_HALF | PHY_100 | PHY_1000); in update_linkspeed()
829 phyreg |= PHY_HALF; in update_linkspeed()
831 phyreg |= PHY_100; in update_linkspeed()
833 phyreg |= PHY_1000; in update_linkspeed()
834 writel(phyreg, base + NvRegPhyInterface); in update_linkspeed()