Lines Matching refs:port
62 static int xm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val);
63 static int gm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val);
64 static void yukon_init(struct skge_hw *hw, int port);
65 static void genesis_mac_init(struct skge_hw *hw, int port);
138 int port = skge->port; in skge_led() local
144 xm_phy_write(hw, port, PHY_BCOM_P_EXT_CTRL, PHY_B_PEC_LED_OFF); in skge_led()
146 skge_write32(hw, SK_REG(port, TX_LED_VAL), 0); in skge_led()
147 skge_write8(hw, SK_REG(port, TX_LED_CTRL), LED_T_OFF); in skge_led()
149 skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF); in skge_led()
150 skge_write32(hw, SK_REG(port, RX_LED_VAL), 0); in skge_led()
151 skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_T_OFF); in skge_led()
155 skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_ON); in skge_led()
156 skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_LINKSYNC_ON); in skge_led()
158 skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_START); in skge_led()
159 skge_write8(hw, SK_REG(port, TX_LED_CTRL), LED_START); in skge_led()
164 skge_write8(hw, SK_REG(port, RX_LED_TST), LED_T_ON); in skge_led()
165 skge_write32(hw, SK_REG(port, RX_LED_VAL), 100); in skge_led()
166 skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_START); in skge_led()
169 xm_phy_write(hw, port, PHY_BCOM_P_EXT_CTRL, PHY_B_PEC_LED_ON); in skge_led()
171 skge_write8(hw, SK_REG(port, TX_LED_TST), LED_T_ON); in skge_led()
172 skge_write32(hw, SK_REG(port, TX_LED_VAL), 100); in skge_led()
173 skge_write8(hw, SK_REG(port, TX_LED_CTRL), LED_START); in skge_led()
180 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0); in skge_led()
181 gm_phy_write(hw, port, PHY_MARV_LED_OVER, in skge_led()
189 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, in skge_led()
195 gm_phy_write(hw, port, PHY_MARV_LED_OVER, in skge_led()
201 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0); in skge_led()
202 gm_phy_write(hw, port, PHY_MARV_LED_OVER, in skge_led()
398 skge_write8(skge->hw, SK_REG(skge->port, LNK_LED_REG), in skge_link_up()
410 skge_write8(skge->hw, SK_REG(skge->port, LNK_LED_REG), LED_OFF); in skge_link_down()
417 static void xm_link_down(struct skge_hw *hw, int port) in xm_link_down() argument
419 struct net_device *dev = hw->dev[port]; in xm_link_down()
422 xm_write16(hw, port, XM_IMSK, XM_IMSK_DISABLE); in xm_link_down()
428 static int __xm_phy_read(struct skge_hw *hw, int port, u16 reg, u16 *val) in __xm_phy_read() argument
432 xm_write16(hw, port, XM_PHY_ADDR, reg | hw->phy_addr); in __xm_phy_read()
433 *val = xm_read16(hw, port, XM_PHY_DATA); in __xm_phy_read()
439 if (xm_read16(hw, port, XM_MMU_CMD) & XM_MMU_PHY_RDY) in __xm_phy_read()
446 *val = xm_read16(hw, port, XM_PHY_DATA); in __xm_phy_read()
451 static u16 xm_phy_read(struct skge_hw *hw, int port, u16 reg) in xm_phy_read() argument
454 if (__xm_phy_read(hw, port, reg, &v)) in xm_phy_read()
456 hw->dev[port]->name); in xm_phy_read()
460 static int xm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val) in xm_phy_write() argument
464 xm_write16(hw, port, XM_PHY_ADDR, reg | hw->phy_addr); in xm_phy_write()
466 if (!(xm_read16(hw, port, XM_MMU_CMD) & XM_MMU_PHY_BUSY)) in xm_phy_write()
473 xm_write16(hw, port, XM_PHY_DATA, val); in xm_phy_write()
475 if (!(xm_read16(hw, port, XM_MMU_CMD) & XM_MMU_PHY_BUSY)) in xm_phy_write()
510 static void genesis_reset(struct skge_hw *hw, int port) in genesis_reset() argument
515 skge_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0); in genesis_reset()
518 xm_write32(hw, port, XM_GP_PORT, XM_GP_RES_STAT); in genesis_reset()
519 xm_write16(hw, port, XM_IMSK, XM_IMSK_DISABLE); in genesis_reset()
520 xm_write32(hw, port, XM_MODE, 0); /* clear Mode Reg */ in genesis_reset()
521 xm_write16(hw, port, XM_TX_CMD, 0); /* reset TX CMD Reg */ in genesis_reset()
522 xm_write16(hw, port, XM_RX_CMD, 0); /* reset RX CMD Reg */ in genesis_reset()
526 xm_write16(hw, port, PHY_BCOM_INT_MASK, 0xffff); in genesis_reset()
528 xm_outhash(hw, port, XM_HSM, zero); in genesis_reset()
531 reg = xm_read32(hw, port, XM_MODE); in genesis_reset()
532 xm_write32(hw, port, XM_MODE, reg | XM_MD_FTF); in genesis_reset()
533 xm_write32(hw, port, XM_MODE, reg | XM_MD_FRF); in genesis_reset()
555 static void bcom_check_link(struct skge_hw *hw, int port) in bcom_check_link() argument
557 struct net_device *dev = hw->dev[port]; in bcom_check_link()
562 xm_phy_read(hw, port, PHY_BCOM_STAT); in bcom_check_link()
563 status = xm_phy_read(hw, port, PHY_BCOM_STAT); in bcom_check_link()
566 xm_link_down(hw, port); in bcom_check_link()
576 lpa = xm_phy_read(hw, port, PHY_XMAC_AUNE_LP); in bcom_check_link()
583 aux = xm_phy_read(hw, port, PHY_BCOM_AUX_STAT); in bcom_check_link()
626 int port = skge->port; in bcom_phy_init() local
645 id1 = xm_phy_read(hw, port, PHY_XMAC_ID1); in bcom_phy_init()
648 r = xm_read16(hw, port, XM_MMU_CMD); in bcom_phy_init()
650 xm_write16(hw, port, XM_MMU_CMD,r); in bcom_phy_init()
659 xm_phy_write(hw, port, in bcom_phy_init()
669 xm_phy_write(hw, port, in bcom_phy_init()
678 r = xm_phy_read(hw, port, PHY_BCOM_AUX_CTRL); in bcom_phy_init()
680 xm_phy_write(hw, port, PHY_BCOM_AUX_CTRL, r); in bcom_phy_init()
683 xm_read16(hw, port, XM_ISRC); in bcom_phy_init()
699 xm_phy_write(hw, port, PHY_BCOM_1000T_CTRL, adv); in bcom_phy_init()
706 xm_phy_write(hw, port, PHY_BCOM_1000T_CTRL, PHY_B_1000C_MSE); in bcom_phy_init()
710 xm_phy_write(hw, port, PHY_BCOM_AUNE_ADV, in bcom_phy_init()
713 xm_phy_write(hw, port, PHY_BCOM_P_EXT_CTRL, ext); in bcom_phy_init()
714 xm_phy_write(hw, port, PHY_BCOM_CTRL, ctl); in bcom_phy_init()
717 xm_phy_write(hw, port, PHY_BCOM_INT_MASK, PHY_B_DEF_MSK); in bcom_phy_init()
723 int port = skge->port; in xm_phy_init() local
734 xm_phy_write(hw, port, PHY_XMAC_AUNE_ADV, ctrl); in xm_phy_init()
748 xm_phy_write(hw, port, PHY_XMAC_CTRL, ctrl); in xm_phy_init()
758 int port = skge->port; in xm_check_link() local
762 xm_phy_read(hw, port, PHY_XMAC_STAT); in xm_check_link()
763 status = xm_phy_read(hw, port, PHY_XMAC_STAT); in xm_check_link()
766 xm_link_down(hw, port); in xm_check_link()
776 lpa = xm_phy_read(hw, port, PHY_XMAC_AUNE_LP); in xm_check_link()
783 res = xm_phy_read(hw, port, PHY_XMAC_RES_ABI); in xm_check_link()
833 int port = skge->port; in xm_link_timer() local
841 if (xm_read16(hw, port, XM_GP_PORT) & XM_GP_INP_ASS) in xm_link_timer()
847 u16 msk = xm_read16(hw, port, XM_IMSK); in xm_link_timer()
849 xm_write16(hw, port, XM_IMSK, msk); in xm_link_timer()
850 xm_read16(hw, port, XM_ISRC); in xm_link_timer()
854 static void genesis_mac_init(struct skge_hw *hw, int port) in genesis_mac_init() argument
856 struct net_device *dev = hw->dev[port]; in genesis_mac_init()
863 skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), in genesis_mac_init()
865 if (skge_read16(hw, SK_REG(port, TX_MFF_CTRL1)) & MFF_SET_MAC_RST) in genesis_mac_init()
874 skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_CLR_MAC_RST); in genesis_mac_init()
884 if (port == 0) in genesis_mac_init()
892 xm_write16(hw, port, XM_HW_CFG, XM_HW_GMII_MD); in genesis_mac_init()
902 bcom_check_link(hw, port); in genesis_mac_init()
906 xm_outaddr(hw, port, XM_SA, dev->ll_addr); in genesis_mac_init()
910 xm_outaddr(hw, port, XM_EXM(i), zero); in genesis_mac_init()
913 xm_write16(hw, port, XM_STAT_CMD, in genesis_mac_init()
916 xm_write16(hw, port, XM_STAT_CMD, in genesis_mac_init()
920 xm_write16(hw, port, XM_RX_HI_WM, 1450); in genesis_mac_init()
933 xm_write16(hw, port, XM_RX_CMD, r); in genesis_mac_init()
936 xm_write16(hw, port, XM_TX_CMD, XM_TX_AUTO_PAD); in genesis_mac_init()
938 xm_write16(hw, port, XM_TX_THR, 512); in genesis_mac_init()
954 xm_write32(hw, port, XM_MODE, XM_DEF_MODE); in genesis_mac_init()
962 xm_write32(hw, port, XM_RX_EV_MSK, XMR_DEF_MSK); in genesis_mac_init()
969 xm_write32(hw, port, XM_TX_EV_MSK, XMT_DEF_MSK); in genesis_mac_init()
986 skge_write8(hw, SK_REG(port, RX_MFF_CTRL2), MFF_RST_CLR); in genesis_mac_init()
987 skge_write16(hw, SK_REG(port, RX_MFF_CTRL1), MFF_ENA_TIM_PAT); in genesis_mac_init()
988 skge_write8(hw, SK_REG(port, RX_MFF_CTRL2), MFF_ENA_OP_MD); in genesis_mac_init()
991 skge_write8(hw, SK_REG(port, TX_MFF_CTRL2), MFF_RST_CLR); in genesis_mac_init()
992 skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_TX_CTRL_DEF); in genesis_mac_init()
993 skge_write8(hw, SK_REG(port, TX_MFF_CTRL2), MFF_ENA_OP_MD); in genesis_mac_init()
997 (port == 0) ? PA_ENA_TO_TX1 : PA_ENA_TO_TX2); in genesis_mac_init()
1003 int port = skge->port; in genesis_stop() local
1008 cmd = xm_read16(hw, port, XM_MMU_CMD); in genesis_stop()
1010 xm_write16(hw, port, XM_MMU_CMD, cmd); in genesis_stop()
1012 genesis_reset(hw, port); in genesis_stop()
1016 port == 0 ? PA_CLR_TO_TX1 : PA_CLR_TO_TX2); in genesis_stop()
1019 skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_CLR_MAC_RST); in genesis_stop()
1021 skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_SET_MAC_RST); in genesis_stop()
1022 if (!(skge_read16(hw, SK_REG(port, TX_MFF_CTRL1)) & MFF_SET_MAC_RST)) in genesis_stop()
1029 if (port == 0) { in genesis_stop()
1040 xm_write16(hw, port, XM_MMU_CMD, in genesis_stop()
1041 xm_read16(hw, port, XM_MMU_CMD) in genesis_stop()
1044 xm_read16(hw, port, XM_MMU_CMD); in genesis_stop()
1050 int port = skge->port; in genesis_link_up() local
1054 cmd = xm_read16(hw, port, XM_MMU_CMD); in genesis_link_up()
1068 xm_write16(hw, port, XM_MMU_CMD, cmd); in genesis_link_up()
1070 mode = xm_read32(hw, port, XM_MODE); in genesis_link_up()
1084 xm_write16(hw, port, XM_MAC_PTIME, 0xffff); in genesis_link_up()
1087 skge_write16(hw, SK_REG(port, RX_MFF_CTRL1), MFF_ENA_PAUSE); in genesis_link_up()
1096 skge_write16(hw, SK_REG(port, RX_MFF_CTRL1), MFF_DIS_PAUSE); in genesis_link_up()
1099 xm_write32(hw, port, XM_MODE, mode); in genesis_link_up()
1102 msk = xm_read16(hw, port, XM_IMSK); in genesis_link_up()
1104 xm_write16(hw, port, XM_IMSK, msk); in genesis_link_up()
1106 xm_read16(hw, port, XM_ISRC); in genesis_link_up()
1109 cmd = xm_read16(hw, port, XM_MMU_CMD); in genesis_link_up()
1118 xm_phy_write(hw, port, PHY_BCOM_AUX_CTRL, in genesis_link_up()
1119 xm_phy_read(hw, port, PHY_BCOM_AUX_CTRL) in genesis_link_up()
1121 xm_phy_write(hw, port, PHY_BCOM_INT_MASK, PHY_B_DEF_MSK); in genesis_link_up()
1125 xm_write16(hw, port, XM_MMU_CMD, in genesis_link_up()
1134 int port = skge->port; in bcom_phy_intr() local
1137 isrc = xm_phy_read(hw, port, PHY_BCOM_INT_STAT); in bcom_phy_intr()
1143 hw->dev[port]->name); in bcom_phy_intr()
1149 u16 ctrl = xm_phy_read(hw, port, PHY_BCOM_CTRL); in bcom_phy_intr()
1150 xm_phy_write(hw, port, PHY_BCOM_CTRL, in bcom_phy_intr()
1152 xm_phy_write(hw, port, PHY_BCOM_CTRL, in bcom_phy_intr()
1157 bcom_check_link(hw, port); in bcom_phy_intr()
1161 static int gm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val) in gm_phy_write() argument
1165 gma_write16(hw, port, GM_SMI_DATA, val); in gm_phy_write()
1166 gma_write16(hw, port, GM_SMI_CTRL, in gm_phy_write()
1171 if (!(gma_read16(hw, port, GM_SMI_CTRL) & GM_SMI_CT_BUSY)) in gm_phy_write()
1176 hw->dev[port]->name, in gm_phy_write()
1177 port, reg, val); in gm_phy_write()
1181 static int __gm_phy_read(struct skge_hw *hw, int port, u16 reg, u16 *val) in __gm_phy_read() argument
1185 gma_write16(hw, port, GM_SMI_CTRL, in __gm_phy_read()
1191 if (gma_read16(hw, port, GM_SMI_CTRL) & GM_SMI_CT_RD_VAL) in __gm_phy_read()
1197 *val = gma_read16(hw, port, GM_SMI_DATA); in __gm_phy_read()
1201 static u16 gm_phy_read(struct skge_hw *hw, int port, u16 reg) in gm_phy_read() argument
1204 if (__gm_phy_read(hw, port, reg, &v)) in gm_phy_read()
1206 hw->dev[port]->name, in gm_phy_read()
1207 port, reg, v); in gm_phy_read()
1212 static void yukon_init(struct skge_hw *hw, int port) in yukon_init() argument
1214 struct skge_port *skge = netdev_priv(hw->dev[port]); in yukon_init()
1218 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL); in yukon_init()
1226 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl); in yukon_init()
1229 ctrl = gm_phy_read(hw, port, PHY_MARV_CTRL); in yukon_init()
1234 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); in yukon_init()
1287 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000); in yukon_init()
1289 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv); in yukon_init()
1290 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); in yukon_init()
1294 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_MSK); in yukon_init()
1296 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_DEF_MSK); in yukon_init()
1299 static void yukon_reset(struct skge_hw *hw, int port) in yukon_reset() argument
1301 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);/* disable PHY IRQs */ in yukon_reset()
1302 gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */ in yukon_reset()
1303 gma_write16(hw, port, GM_MC_ADDR_H2, 0); in yukon_reset()
1304 gma_write16(hw, port, GM_MC_ADDR_H3, 0); in yukon_reset()
1305 gma_write16(hw, port, GM_MC_ADDR_H4, 0); in yukon_reset()
1307 gma_write16(hw, port, GM_RX_CTRL, in yukon_reset()
1308 gma_read16(hw, port, GM_RX_CTRL) in yukon_reset()
1328 static void yukon_mac_init(struct skge_hw *hw, int port) in yukon_mac_init() argument
1330 struct skge_port *skge = netdev_priv(hw->dev[port]); in yukon_mac_init()
1333 const u8 *addr = hw->dev[port]->ll_addr; in yukon_mac_init()
1344 skge_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in yukon_mac_init()
1345 skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET); in yukon_mac_init()
1362 skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_SET); in yukon_mac_init()
1363 skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_CLR); in yukon_mac_init()
1364 skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON | GMC_RST_CLR); in yukon_mac_init()
1368 gma_write16(hw, port, GM_GP_CTRL, in yukon_mac_init()
1369 gma_read16(hw, port, GM_GP_CTRL) | reg); in yukon_mac_init()
1392 skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); in yukon_mac_init()
1405 gma_write16(hw, port, GM_GP_CTRL, reg); in yukon_mac_init()
1406 skge_read16(hw, SK_REG(port, GMAC_IRQ_SRC)); in yukon_mac_init()
1408 yukon_init(hw, port); in yukon_mac_init()
1411 reg = gma_read16(hw, port, GM_PHY_ADDR); in yukon_mac_init()
1412 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR); in yukon_mac_init()
1415 gma_read16(hw, port, GM_MIB_CNT_BASE + 8*i); in yukon_mac_init()
1416 gma_write16(hw, port, GM_PHY_ADDR, reg); in yukon_mac_init()
1419 gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF)); in yukon_mac_init()
1422 gma_write16(hw, port, GM_RX_CTRL, in yukon_mac_init()
1426 gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff); in yukon_mac_init()
1429 gma_write16(hw, port, GM_TX_PARAM, in yukon_mac_init()
1439 gma_write16(hw, port, GM_SERIAL_MODE, reg); in yukon_mac_init()
1442 gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr); in yukon_mac_init()
1444 gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr); in yukon_mac_init()
1447 gma_write16(hw, port, GM_TX_IRQ_MSK, 0); in yukon_mac_init()
1448 gma_write16(hw, port, GM_RX_IRQ_MSK, 0); in yukon_mac_init()
1449 gma_write16(hw, port, GM_TR_IRQ_MSK, 0); in yukon_mac_init()
1454 skge_write16(hw, SK_REG(port, RX_GMF_FL_MSK), RX_FF_FL_DEF_MSK); in yukon_mac_init()
1461 skge_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR); in yukon_mac_init()
1462 skge_write16(hw, SK_REG(port, RX_GMF_CTRL_T), reg); in yukon_mac_init()
1468 skge_write16(hw, SK_REG(port, RX_GMF_FL_THR), RX_GMF_FL_THR_DEF+1); in yukon_mac_init()
1471 skge_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR); in yukon_mac_init()
1472 skge_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON); in yukon_mac_init()
1476 static void yukon_suspend(struct skge_hw *hw, int port) in yukon_suspend() argument
1480 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in yukon_suspend()
1482 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in yukon_suspend()
1484 ctrl = gm_phy_read(hw, port, PHY_MARV_CTRL); in yukon_suspend()
1486 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); in yukon_suspend()
1489 ctrl = gm_phy_read(hw, port, PHY_MARV_CTRL); in yukon_suspend()
1491 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); in yukon_suspend()
1497 int port = skge->port; in yukon_stop() local
1499 skge_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0); in yukon_stop()
1500 yukon_reset(hw, port); in yukon_stop()
1502 gma_write16(hw, port, GM_GP_CTRL, in yukon_stop()
1503 gma_read16(hw, port, GM_GP_CTRL) in yukon_stop()
1505 gma_read16(hw, port, GM_GP_CTRL); in yukon_stop()
1507 yukon_suspend(hw, port); in yukon_stop()
1510 skge_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in yukon_stop()
1511 skge_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET); in yukon_stop()
1529 int port = skge->port; in yukon_link_up() local
1533 skge_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK); in yukon_link_up()
1535 reg = gma_read16(hw, port, GM_GP_CTRL); in yukon_link_up()
1541 gma_write16(hw, port, GM_GP_CTRL, reg); in yukon_link_up()
1543 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_DEF_MSK); in yukon_link_up()
1550 int port = skge->port; in yukon_link_down() local
1553 ctrl = gma_read16(hw, port, GM_GP_CTRL); in yukon_link_down()
1555 gma_write16(hw, port, GM_GP_CTRL, ctrl); in yukon_link_down()
1558 ctrl = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV); in yukon_link_down()
1561 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, ctrl); in yukon_link_down()
1566 yukon_init(hw, port); in yukon_link_down()
1572 int port = skge->port; in yukon_phy_intr() local
1576 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT); in yukon_phy_intr()
1577 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT); in yukon_phy_intr()
1583 if (gm_phy_read(hw, port, PHY_MARV_AUNE_LP) in yukon_phy_intr()
1589 if (gm_phy_read(hw, port, PHY_MARV_1000T_STAT) & PHY_B_1000S_MSF) { in yukon_phy_intr()
1620 skge_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); in yukon_phy_intr()
1622 skge_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); in yukon_phy_intr()
1713 int port = skge->port; in skge_up() local
1751 genesis_mac_init(hw, port); in skge_up()
1753 yukon_mac_init(hw, port); in skge_up()
1757 ram_addr = hw->ram_offset + 2 * chunk * port; in skge_up()
1759 skge_ramset(hw, rxqaddr[port], ram_addr, chunk); in skge_up()
1760 skge_qset(skge, rxqaddr[port], skge->rx_ring.to_clean); in skge_up()
1763 skge_ramset(hw, txqaddr[port], ram_addr+chunk, chunk); in skge_up()
1764 skge_qset(skge, txqaddr[port], skge->tx_ring.to_use); in skge_up()
1768 skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F); in skge_up()
1771 hw->intr_mask |= portmask[port]; in skge_up()
1784 static void skge_rx_stop(struct skge_hw *hw, int port) in skge_rx_stop() argument
1786 skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_STOP); in skge_rx_stop()
1787 skge_write32(hw, RB_ADDR(port ? Q_R2 : Q_R1, RB_CTRL), in skge_rx_stop()
1789 skge_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_SET_RESET); in skge_rx_stop()
1796 int port = skge->port; in skge_down() local
1808 hw->intr_mask &= ~portmask[port]; in skge_down()
1811 skge_write8(skge->hw, SK_REG(skge->port, LNK_LED_REG), LED_OFF); in skge_down()
1818 skge_write8(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_STOP); in skge_down()
1819 skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), in skge_down()
1824 skge_write8(hw, SK_REG(port, TXA_CTRL), in skge_down()
1828 skge_write32(hw, SK_REG(port, TXA_ITI_INI), 0L); in skge_down()
1829 skge_write32(hw, SK_REG(port, TXA_LIM_INI), 0L); in skge_down()
1832 skge_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_SET_RESET); in skge_down()
1833 skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET); in skge_down()
1836 skge_write8(hw, RB_ADDR(port == 0 ? Q_XA1 : Q_XA2, RB_CTRL), RB_RST_SET); in skge_down()
1838 skge_rx_stop(hw, port); in skge_down()
1841 skge_write8(hw, SK_REG(port, TX_MFF_CTRL2), MFF_RST_SET); in skge_down()
1842 skge_write8(hw, SK_REG(port, RX_MFF_CTRL2), MFF_RST_SET); in skge_down()
1844 skge_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); in skge_down()
1845 skge_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET); in skge_down()
1895 skge_write8(hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_START); in skge_xmit_frame()
1950 skge_write8(skge->hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_IRQ_CL_F); in skge_tx_done()
2073 skge_write8(hw, Q_ADDR(rxqaddr[skge->port], Q_CSR), CSR_IRQ_CL_F); in skge_poll()
2079 skge_write8(hw, Q_ADDR(rxqaddr[skge->port], Q_CSR), CSR_START); in skge_poll()
2088 int port; in skge_phyirq() local
2090 for (port = 0; port < hw->ports; port++) { in skge_phyirq()
2091 struct net_device *dev = hw->dev[port]; in skge_phyirq()
2296 static struct net_device *skge_devinit(struct skge_hw *hw, int port, in skge_devinit() argument
2320 hw->dev[port] = dev; in skge_devinit()
2322 skge->port = port; in skge_devinit()
2325 memcpy(dev->hw_addr, (void *) (hw->regs + B2_MAC_1 + port*8), ETH_ALEN); in skge_devinit()
2460 hw->intr_mask |= portmask[skge->port]; in skge_net_irq()
2462 hw->intr_mask &= ~portmask[skge->port]; in skge_net_irq()