Lines Matching refs:port
130 static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val) in gm_phy_write() argument
134 gma_write16(hw, port, GM_SMI_DATA, val); in gm_phy_write()
135 gma_write16(hw, port, GM_SMI_CTRL, in gm_phy_write()
139 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL); in gm_phy_write()
149 DBG(PFX "%s: phy write timeout\n", hw->dev[port]->name); in gm_phy_write()
153 DBG(PFX "%s: phy I/O error\n", hw->dev[port]->name); in gm_phy_write()
157 static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val) in __gm_phy_read() argument
161 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) in __gm_phy_read()
165 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL); in __gm_phy_read()
170 *val = gma_read16(hw, port, GM_SMI_DATA); in __gm_phy_read()
177 DBG(PFX "%s: phy read timeout\n", hw->dev[port]->name); in __gm_phy_read()
180 DBG(PFX "%s: phy I/O error\n", hw->dev[port]->name); in __gm_phy_read()
184 static inline u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg) in gm_phy_read() argument
187 __gm_phy_read(hw, port, reg, &v); in gm_phy_read()
254 static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port) in sky2_gmac_reset() argument
259 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0); in sky2_gmac_reset()
261 gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */ in sky2_gmac_reset()
262 gma_write16(hw, port, GM_MC_ADDR_H2, 0); in sky2_gmac_reset()
263 gma_write16(hw, port, GM_MC_ADDR_H3, 0); in sky2_gmac_reset()
264 gma_write16(hw, port, GM_MC_ADDR_H4, 0); in sky2_gmac_reset()
266 reg = gma_read16(hw, port, GM_RX_CTRL); in sky2_gmac_reset()
268 gma_write16(hw, port, GM_RX_CTRL, reg); in sky2_gmac_reset()
296 static void sky2_phy_init(struct sky2_hw *hw, unsigned port) in sky2_phy_init() argument
298 struct sky2_port *sky2 = netdev_priv(hw->dev[port]); in sky2_phy_init()
303 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL); in sky2_phy_init()
317 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl); in sky2_phy_init()
320 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_init()
331 spec = gm_phy_read(hw, port, PHY_MARV_FE_SPEC_2); in sky2_phy_init()
333 gm_phy_write(hw, port, PHY_MARV_FE_SPEC_2, spec); in sky2_phy_init()
357 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_init()
361 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); in sky2_phy_init()
364 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2); in sky2_phy_init()
365 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_init()
368 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_init()
372 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1); in sky2_phy_init()
375 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_init()
377 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_init()
380 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); in sky2_phy_init()
444 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); in sky2_phy_init()
446 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); in sky2_phy_init()
449 gma_write16(hw, port, GM_GP_CTRL, reg); in sky2_phy_init()
452 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000); in sky2_phy_init()
454 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv); in sky2_phy_init()
455 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); in sky2_phy_init()
466 ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR); in sky2_phy_init()
472 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl); in sky2_phy_init()
477 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_init()
482 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_init()
489 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl); in sky2_phy_init()
493 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); in sky2_phy_init()
496 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); in sky2_phy_init()
499 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_phy_init()
506 gm_phy_write(hw, port, PHY_MARV_PHY_STAT, in sky2_phy_init()
515 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); in sky2_phy_init()
521 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); in sky2_phy_init()
524 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); in sky2_phy_init()
527 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_phy_init()
534 gm_phy_write(hw, port, PHY_MARV_INT_MASK, in sky2_phy_init()
537 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); in sky2_phy_init()
550 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255); in sky2_phy_init()
553 gm_phy_write(hw, port, 0x18, 0xaa99); in sky2_phy_init()
554 gm_phy_write(hw, port, 0x17, 0x2011); in sky2_phy_init()
558 gm_phy_write(hw, port, 0x18, 0xa204); in sky2_phy_init()
559 gm_phy_write(hw, port, 0x17, 0x2002); in sky2_phy_init()
563 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_init()
567 gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17); in sky2_phy_init()
568 gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60); in sky2_phy_init()
572 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl); in sky2_phy_init()
580 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover); in sky2_phy_init()
586 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL); in sky2_phy_init()
588 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); in sky2_phy_init()
594 static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port) in sky2_phy_power_up() argument
600 reg1 &= ~phy_power[port]; in sky2_phy_power_up()
603 reg1 |= coma_mode[port]; in sky2_phy_power_up()
610 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_ANE); in sky2_phy_power_up()
612 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_phy_power_up()
615 static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port) in sky2_phy_power_down() argument
621 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_phy_power_down()
624 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR); in sky2_phy_power_down()
628 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2); in sky2_phy_power_down()
630 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_power_down()
633 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_power_down()
636 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_power_down()
640 gma_write16(hw, port, GM_GP_CTRL, in sky2_phy_power_down()
646 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2); in sky2_phy_power_down()
648 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_power_down()
651 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_power_down()
654 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_power_down()
658 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_PDOWN); in sky2_phy_power_down()
663 reg1 |= phy_power[port]; /* set PHY to PowerDown/COMA Mode */ in sky2_phy_power_down()
668 static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port) in sky2_set_tx_stfwd() argument
675 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), in sky2_set_tx_stfwd()
678 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA); in sky2_set_tx_stfwd()
682 static void sky2_mac_init(struct sky2_hw *hw, unsigned port) in sky2_mac_init() argument
687 const u8 *addr = hw->dev[port]->ll_addr; in sky2_mac_init()
689 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in sky2_mac_init()
690 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_mac_init()
692 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR); in sky2_mac_init()
694 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 && port == 1) { in sky2_mac_init()
706 sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC)); in sky2_mac_init()
709 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK); in sky2_mac_init()
711 sky2_phy_power_up(hw, port); in sky2_mac_init()
712 sky2_phy_init(hw, port); in sky2_mac_init()
715 reg = gma_read16(hw, port, GM_PHY_ADDR); in sky2_mac_init()
716 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR); in sky2_mac_init()
719 gma_read16(hw, port, i); in sky2_mac_init()
720 gma_write16(hw, port, GM_PHY_ADDR, reg); in sky2_mac_init()
723 gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF)); in sky2_mac_init()
726 gma_write16(hw, port, GM_RX_CTRL, in sky2_mac_init()
730 gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff); in sky2_mac_init()
733 gma_write16(hw, port, GM_TX_PARAM, in sky2_mac_init()
743 gma_write16(hw, port, GM_SERIAL_MODE, reg); in sky2_mac_init()
746 gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr); in sky2_mac_init()
749 gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr); in sky2_mac_init()
752 gma_write16(hw, port, GM_TX_IRQ_MSK, 0); in sky2_mac_init()
753 gma_write16(hw, port, GM_RX_IRQ_MSK, 0); in sky2_mac_init()
754 gma_write16(hw, port, GM_TR_IRQ_MSK, 0); in sky2_mac_init()
757 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR); in sky2_mac_init()
763 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg); in sky2_mac_init()
767 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), 0); in sky2_mac_init()
770 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR); in sky2_mac_init()
779 sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), reg); in sky2_mac_init()
782 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR); in sky2_mac_init()
783 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON); in sky2_mac_init()
787 sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8); in sky2_mac_init()
788 sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8); in sky2_mac_init()
790 sky2_set_tx_stfwd(hw, port); in sky2_mac_init()
796 reg = sky2_read16(hw, SK_REG(port, TX_GMF_EA)); in sky2_mac_init()
798 sky2_write16(hw, SK_REG(port, TX_GMF_EA), reg); in sky2_mac_init()
951 Q_ADDR(rxqaddr[sky2->port], Q_CSR), in rx_set_checksum()
968 unsigned rxq = rxqaddr[sky2->port]; in sky2_rx_stop()
1048 unsigned rxq = rxqaddr[sky2->port]; in sky2_rx_start()
1097 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF); in sky2_rx_start()
1099 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), thresh); in sky2_rx_start()
1100 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON); in sky2_rx_start()
1132 unsigned port = sky2->port; in sky2_up() local
1161 sky2_mac_init(hw, port); in sky2_up()
1175 sky2_ramset(hw, rxqaddr[port], 0, rxspace); in sky2_up()
1176 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace); in sky2_up()
1179 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL), in sky2_up()
1183 sky2_qset(hw, txqaddr[port]); in sky2_up()
1187 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF); in sky2_up()
1192 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV); in sky2_up()
1194 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map, in sky2_up()
1203 imask |= portirq_msk[port]; in sky2_up()
1269 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod); in sky2_xmit_frame()
1315 unsigned port = sky2->port; in sky2_down() local
1327 imask &= ~portirq_msk[port]; in sky2_down()
1330 sky2_gmac_reset(hw, port); in sky2_down()
1333 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP); in sky2_down()
1334 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR)); in sky2_down()
1336 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), in sky2_down()
1339 ctrl = gma_read16(hw, port, GM_GP_CTRL); in sky2_down()
1341 gma_write16(hw, port, GM_GP_CTRL, ctrl); in sky2_down()
1343 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in sky2_down()
1347 && port == 0 && hw->dev[1])) in sky2_down()
1348 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET); in sky2_down()
1351 sky2_write8(hw, SK_REG(port, TXA_CTRL), in sky2_down()
1355 sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L); in sky2_down()
1356 sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L); in sky2_down()
1359 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), in sky2_down()
1363 sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL), in sky2_down()
1366 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET); in sky2_down()
1370 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); in sky2_down()
1371 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET); in sky2_down()
1373 sky2_phy_power_down(hw, port); in sky2_down()
1411 unsigned port = sky2->port; in sky2_link_up() local
1421 reg = gma_read16(hw, port, GM_GP_CTRL); in sky2_link_up()
1423 gma_write16(hw, port, GM_GP_CTRL, reg); in sky2_link_up()
1425 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); in sky2_link_up()
1430 sky2_write8(hw, SK_REG(port, LNK_LED_REG), in sky2_link_up()
1442 unsigned port = sky2->port; in sky2_link_down() local
1445 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0); in sky2_link_down()
1447 reg = gma_read16(hw, port, GM_GP_CTRL); in sky2_link_down()
1449 gma_write16(hw, port, GM_GP_CTRL, reg); in sky2_link_down()
1454 sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF); in sky2_link_down()
1458 sky2_phy_init(hw, port); in sky2_link_down()
1464 unsigned port = sky2->port; in sky2_autoneg_done() local
1467 advert = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV); in sky2_autoneg_done()
1468 lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP); in sky2_autoneg_done()
1502 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); in sky2_autoneg_done()
1504 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); in sky2_autoneg_done()
1510 static void sky2_phy_intr(struct sky2_hw *hw, unsigned port) in sky2_phy_intr() argument
1512 struct net_device *dev = hw->dev[port]; in sky2_phy_intr()
1516 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT); in sky2_phy_intr()
1517 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT); in sky2_phy_intr()
1650 unsigned port; in sky2_status_intr() local
1660 port = le->css & CSS_LINK_BIT; in sky2_status_intr()
1661 dev = hw->dev[port]; in sky2_status_intr()
1671 ++rx[port]; in sky2_status_intr()
1710 static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status) in sky2_hw_error() argument
1712 struct net_device *dev = hw->dev[port]; in sky2_hw_error()
1719 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR); in sky2_hw_error()
1724 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR); in sky2_hw_error()
1729 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE); in sky2_hw_error()
1734 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR); in sky2_hw_error()
1739 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP); in sky2_hw_error()
1786 static void sky2_mac_intr(struct sky2_hw *hw, unsigned port) in sky2_mac_intr() argument
1788 struct net_device *dev = hw->dev[port]; in sky2_mac_intr()
1789 u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC)); in sky2_mac_intr()
1794 gma_read16(hw, port, GM_RX_IRQ_SRC); in sky2_mac_intr()
1797 gma_read16(hw, port, GM_TX_IRQ_SRC); in sky2_mac_intr()
1800 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO); in sky2_mac_intr()
1804 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU); in sky2_mac_intr()
1809 static void sky2_le_error(struct sky2_hw *hw, unsigned port, in sky2_le_error() argument
1812 struct net_device *dev = hw->dev[port]; in sky2_le_error()
2158 unsigned port = sky2->port; in sky2_set_multicast() local
2165 reg = gma_read16(hw, port, GM_RX_CTRL); in sky2_set_multicast()
2170 gma_write16(hw, port, GM_MC_ADDR_H1, in sky2_set_multicast()
2172 gma_write16(hw, port, GM_MC_ADDR_H2, in sky2_set_multicast()
2174 gma_write16(hw, port, GM_MC_ADDR_H3, in sky2_set_multicast()
2176 gma_write16(hw, port, GM_MC_ADDR_H4, in sky2_set_multicast()
2179 gma_write16(hw, port, GM_RX_CTRL, reg); in sky2_set_multicast()
2184 unsigned port) in sky2_init_netdev() argument
2208 hw->dev[port] = dev; in sky2_init_netdev()
2210 sky2->port = port; in sky2_init_netdev()
2213 memcpy(dev->hw_addr, (void *)(hw->regs + B2_MAC_1 + port * 8), ETH_ALEN); in sky2_init_netdev()
2253 imask |= portirq_msk[sky2->port]; in sky2_net_irq()
2255 imask &= ~portirq_msk[sky2->port]; in sky2_net_irq()