102   LOperand* destination = moves_[index].destination();  in PerformMove()  local
111     if (other_move.Blocks(destination) && !other_move.IsPending()) {  in PerformMove()
121   moves_[index].set_destination(destination);  in PerformMove()
127   if (other_move.Blocks(destination)) {  in PerformMove()
142     LOperand* destination = moves_[i].destination();  in Verify()  local
144       SLOW_DCHECK(!destination->Equals(moves_[j].destination()));  in Verify()
155   DCHECK(moves_[index].destination()->Equals(moves_[root_index_].source()));  in BreakCycle()
159   saved_destination_ = moves_[index].destination();  in BreakCycle()
201   LOperand* destination = moves_[index].destination();  in EmitMove()  local
208     if (destination->IsRegister()) {  in EmitMove()
209       __ mov(cgen_->ToRegister(destination), source_register);  in EmitMove()
211       DCHECK(destination->IsStackSlot());  in EmitMove()
212       __ str(source_register, cgen_->ToMemOperand(destination));  in EmitMove()
216     if (destination->IsRegister()) {  in EmitMove()
217       __ ldr(cgen_->ToRegister(destination), source_operand);  in EmitMove()
219       DCHECK(destination->IsStackSlot());  in EmitMove()
220       MemOperand destination_operand = cgen_->ToMemOperand(destination);  in EmitMove()
235     if (destination->IsRegister()) {  in EmitMove()
236       Register dst = cgen_->ToRegister(destination);  in EmitMove()
244     } else if (destination->IsDoubleRegister()) {  in EmitMove()
245       DwVfpRegister result = cgen_->ToDoubleRegister(destination);  in EmitMove()
249       DCHECK(destination->IsStackSlot());  in EmitMove()
260       __ str(kSavedValueRegister, cgen_->ToMemOperand(destination));  in EmitMove()
265     if (destination->IsDoubleRegister()) {  in EmitMove()
266       __ vmov(cgen_->ToDoubleRegister(destination), source_register);  in EmitMove()
268       DCHECK(destination->IsDoubleStackSlot());  in EmitMove()
269       __ vstr(source_register, cgen_->ToMemOperand(destination));  in EmitMove()
274     if (destination->IsDoubleRegister()) {  in EmitMove()
275       __ vldr(cgen_->ToDoubleRegister(destination), source_operand);  in EmitMove()
277       DCHECK(destination->IsDoubleStackSlot());  in EmitMove()
278       MemOperand destination_operand = cgen_->ToMemOperand(destination);  in EmitMove()