Lines Matching refs:IsSpilled

120   DCHECK(!HasRegisterAssigned() && !IsSpilled());  in set_assigned_register()
127   DCHECK(!IsSpilled());  in MakeSpilled()
204     DCHECK(!IsSpilled());  in CreateAssignedOperand()
215   } else if (IsSpilled()) {  in CreateAssignedOperand()
1140   if (cur_cover->IsSpilled()) return;  in ResolveControlFlow()
1208       if (!second_range->IsSpilled()) {  in ConnectRanges()
1451       if (!cur->IsSpilled()) {  in PopulatePointerMaps()
1573     DCHECK(!current->HasRegisterAssigned() && !current->IsSpilled());  in AllocateRegisters()
1647   DCHECK(!range->HasRegisterAssigned() && !range->IsSpilled());  in AddToUnhandledSorted()
1666   DCHECK(!range->HasRegisterAssigned() && !range->IsSpilled());  in AddToUnhandledUnsorted()
2131   DCHECK(!range->IsSpilled());  in Spill()