1531 static IRExpr* getYMMRegLane128 ( UInt ymmreg, Int laneno )  in getYMMRegLane128()  function
11006    assign(t0, getYMMRegLane128(rE, 0));  in dis_PMOVMSKB_256()
11007    assign(t1, getYMMRegLane128(rE, 1));  in dis_PMOVMSKB_256()
11835                getYMMRegLane128(reg,1),  in gen_XSAVE_SEQUENCE()
12091       IRExpr* alt = getYMMRegLane128(reg, 1);  in gen_XRSTOR_SEQUENCE()
26141             assign( vecS0, getYMMRegLane128(rS, 0));  in dis_ESC_0F__VEX()
26142             assign( vecS1, getYMMRegLane128(rS, 1));  in dis_ESC_0F__VEX()
26154             assign( vecS0, getYMMRegLane128(rS, 0));  in dis_ESC_0F__VEX()
26155             assign( vecS1, getYMMRegLane128(rS, 1));  in dis_ESC_0F__VEX()
30674          assign(s00, getYMMRegLane128(rV, 0));  in dis_ESC_0F3A__VEX()
30675          assign(s01, getYMMRegLane128(rV, 1));  in dis_ESC_0F3A__VEX()
30682             assign(s10, getYMMRegLane128(rE, 0));  in dis_ESC_0F3A__VEX()
30683             assign(s11, getYMMRegLane128(rE, 1));  in dis_ESC_0F3A__VEX()
31309          putYMMRegLane128(rG, 0,   getYMMRegLane128(rV, 0));  in dis_ESC_0F3A__VEX()
31310          putYMMRegLane128(rG, 1,   getYMMRegLane128(rV, 1));  in dis_ESC_0F3A__VEX()
31331             assign(t128, getYMMRegLane128(rS, ib & 1));  in dis_ESC_0F3A__VEX()
31339             assign(t128, getYMMRegLane128(rS, ib & 1));  in dis_ESC_0F3A__VEX()
31519          putYMMRegLane128(rG, 0,   getYMMRegLane128(rV, 0));  in dis_ESC_0F3A__VEX()
31520          putYMMRegLane128(rG, 1,   getYMMRegLane128(rV, 1));  in dis_ESC_0F3A__VEX()
31541             assign(t128, getYMMRegLane128(rS, ib & 1));  in dis_ESC_0F3A__VEX()
31549             assign(t128, getYMMRegLane128(rS, ib & 1));  in dis_ESC_0F3A__VEX()
31791          assign(s00, getYMMRegLane128(rV, 0));  in dis_ESC_0F3A__VEX()
31792          assign(s01, getYMMRegLane128(rV, 1));  in dis_ESC_0F3A__VEX()
31799             assign(s10, getYMMRegLane128(rE, 0));  in dis_ESC_0F3A__VEX()
31800             assign(s11, getYMMRegLane128(rE, 1));  in dis_ESC_0F3A__VEX()