Lines Matching refs:putYMMRegLane32
1586 static void putYMMRegLane32 ( UInt ymmreg, Int laneno, IRExpr* e ) in putYMMRegLane32() function
10752 putYMMRegLane32( rG, 7, CVT(t7) ); in dis_CVTxPS2DQ_256()
10753 putYMMRegLane32( rG, 6, CVT(t6) ); in dis_CVTxPS2DQ_256()
10754 putYMMRegLane32( rG, 5, CVT(t5) ); in dis_CVTxPS2DQ_256()
10755 putYMMRegLane32( rG, 4, CVT(t4) ); in dis_CVTxPS2DQ_256()
10756 putYMMRegLane32( rG, 3, CVT(t3) ); in dis_CVTxPS2DQ_256()
10757 putYMMRegLane32( rG, 2, CVT(t2) ); in dis_CVTxPS2DQ_256()
10758 putYMMRegLane32( rG, 1, CVT(t1) ); in dis_CVTxPS2DQ_256()
10759 putYMMRegLane32( rG, 0, CVT(t0) ); in dis_CVTxPS2DQ_256()
23135 putYMMRegLane32( rG, i, (i < 4 || isYMM) in dis_AVX_var_shiftV_byE()
27844 case Ity_F32: putYMMRegLane32(rG, 1, mkU32(0)); /*fallthru*/ in dis_FMA()
27910 (laneIs32 ? putYMMRegLane32 : putYMMRegLane64)( rG, i, mkexpr(data) ); in dis_VMASKMOV()
27997 putYMMRegLane32( rG, i, expr ); in dis_VGATHER()
27998 putYMMRegLane32( rV, i, mkU32(0) ); in dis_VGATHER()
30486 putYMMRegLane32(rG, i, mkexpr((imm8 & (1<<i)) ? d[i] : s[i])); in dis_ESC_0F3A__VEX()
30528 putYMMRegLane32(rG, i, mkexpr((imm8 & (1<<i)) ? d[i] : s[i])); in dis_ESC_0F3A__VEX()