Lines Matching refs:VexGuestMIPS32State
106 ret = offsetof(VexGuestMIPS32State, guest_r0); break; in integerGuestRegOffset()
108 ret = offsetof(VexGuestMIPS32State, guest_r1); break; in integerGuestRegOffset()
110 ret = offsetof(VexGuestMIPS32State, guest_r2); break; in integerGuestRegOffset()
112 ret = offsetof(VexGuestMIPS32State, guest_r3); break; in integerGuestRegOffset()
114 ret = offsetof(VexGuestMIPS32State, guest_r4); break; in integerGuestRegOffset()
116 ret = offsetof(VexGuestMIPS32State, guest_r5); break; in integerGuestRegOffset()
118 ret = offsetof(VexGuestMIPS32State, guest_r6); break; in integerGuestRegOffset()
120 ret = offsetof(VexGuestMIPS32State, guest_r7); break; in integerGuestRegOffset()
122 ret = offsetof(VexGuestMIPS32State, guest_r8); break; in integerGuestRegOffset()
124 ret = offsetof(VexGuestMIPS32State, guest_r9); break; in integerGuestRegOffset()
126 ret = offsetof(VexGuestMIPS32State, guest_r10); break; in integerGuestRegOffset()
128 ret = offsetof(VexGuestMIPS32State, guest_r11); break; in integerGuestRegOffset()
130 ret = offsetof(VexGuestMIPS32State, guest_r12); break; in integerGuestRegOffset()
132 ret = offsetof(VexGuestMIPS32State, guest_r13); break; in integerGuestRegOffset()
134 ret = offsetof(VexGuestMIPS32State, guest_r14); break; in integerGuestRegOffset()
136 ret = offsetof(VexGuestMIPS32State, guest_r15); break; in integerGuestRegOffset()
138 ret = offsetof(VexGuestMIPS32State, guest_r16); break; in integerGuestRegOffset()
140 ret = offsetof(VexGuestMIPS32State, guest_r17); break; in integerGuestRegOffset()
142 ret = offsetof(VexGuestMIPS32State, guest_r18); break; in integerGuestRegOffset()
144 ret = offsetof(VexGuestMIPS32State, guest_r19); break; in integerGuestRegOffset()
146 ret = offsetof(VexGuestMIPS32State, guest_r20); break; in integerGuestRegOffset()
148 ret = offsetof(VexGuestMIPS32State, guest_r21); break; in integerGuestRegOffset()
150 ret = offsetof(VexGuestMIPS32State, guest_r22); break; in integerGuestRegOffset()
152 ret = offsetof(VexGuestMIPS32State, guest_r23); break; in integerGuestRegOffset()
154 ret = offsetof(VexGuestMIPS32State, guest_r24); break; in integerGuestRegOffset()
156 ret = offsetof(VexGuestMIPS32State, guest_r25); break; in integerGuestRegOffset()
158 ret = offsetof(VexGuestMIPS32State, guest_r26); break; in integerGuestRegOffset()
160 ret = offsetof(VexGuestMIPS32State, guest_r27); break; in integerGuestRegOffset()
162 ret = offsetof(VexGuestMIPS32State, guest_r28); break; in integerGuestRegOffset()
164 ret = offsetof(VexGuestMIPS32State, guest_r29); break; in integerGuestRegOffset()
166 ret = offsetof(VexGuestMIPS32State, guest_r30); break; in integerGuestRegOffset()
168 ret = offsetof(VexGuestMIPS32State, guest_r31); break; in integerGuestRegOffset()
247 #define OFFB_PC offsetof(VexGuestMIPS32State, guest_PC)
261 ret = offsetof(VexGuestMIPS32State, guest_f0); break; in floatGuestRegOffset()
263 ret = offsetof(VexGuestMIPS32State, guest_f1); break; in floatGuestRegOffset()
265 ret = offsetof(VexGuestMIPS32State, guest_f2); break; in floatGuestRegOffset()
267 ret = offsetof(VexGuestMIPS32State, guest_f3); break; in floatGuestRegOffset()
269 ret = offsetof(VexGuestMIPS32State, guest_f4); break; in floatGuestRegOffset()
271 ret = offsetof(VexGuestMIPS32State, guest_f5); break; in floatGuestRegOffset()
273 ret = offsetof(VexGuestMIPS32State, guest_f6); break; in floatGuestRegOffset()
275 ret = offsetof(VexGuestMIPS32State, guest_f7); break; in floatGuestRegOffset()
277 ret = offsetof(VexGuestMIPS32State, guest_f8); break; in floatGuestRegOffset()
279 ret = offsetof(VexGuestMIPS32State, guest_f9); break; in floatGuestRegOffset()
281 ret = offsetof(VexGuestMIPS32State, guest_f10); break; in floatGuestRegOffset()
283 ret = offsetof(VexGuestMIPS32State, guest_f11); break; in floatGuestRegOffset()
285 ret = offsetof(VexGuestMIPS32State, guest_f12); break; in floatGuestRegOffset()
287 ret = offsetof(VexGuestMIPS32State, guest_f13); break; in floatGuestRegOffset()
289 ret = offsetof(VexGuestMIPS32State, guest_f14); break; in floatGuestRegOffset()
291 ret = offsetof(VexGuestMIPS32State, guest_f15); break; in floatGuestRegOffset()
293 ret = offsetof(VexGuestMIPS32State, guest_f16); break; in floatGuestRegOffset()
295 ret = offsetof(VexGuestMIPS32State, guest_f17); break; in floatGuestRegOffset()
297 ret = offsetof(VexGuestMIPS32State, guest_f18); break; in floatGuestRegOffset()
299 ret = offsetof(VexGuestMIPS32State, guest_f19); break; in floatGuestRegOffset()
301 ret = offsetof(VexGuestMIPS32State, guest_f20); break; in floatGuestRegOffset()
303 ret = offsetof(VexGuestMIPS32State, guest_f21); break; in floatGuestRegOffset()
305 ret = offsetof(VexGuestMIPS32State, guest_f22); break; in floatGuestRegOffset()
307 ret = offsetof(VexGuestMIPS32State, guest_f23); break; in floatGuestRegOffset()
309 ret = offsetof(VexGuestMIPS32State, guest_f24); break; in floatGuestRegOffset()
311 ret = offsetof(VexGuestMIPS32State, guest_f25); break; in floatGuestRegOffset()
313 ret = offsetof(VexGuestMIPS32State, guest_f26); break; in floatGuestRegOffset()
315 ret = offsetof(VexGuestMIPS32State, guest_f27); break; in floatGuestRegOffset()
317 ret = offsetof(VexGuestMIPS32State, guest_f28); break; in floatGuestRegOffset()
319 ret = offsetof(VexGuestMIPS32State, guest_f29); break; in floatGuestRegOffset()
321 ret = offsetof(VexGuestMIPS32State, guest_f30); break; in floatGuestRegOffset()
323 ret = offsetof(VexGuestMIPS32State, guest_f31); break; in floatGuestRegOffset()
410 ret = offsetof(VexGuestMIPS32State, guest_ac0); break; in accumulatorGuestRegOffset()
412 ret = offsetof(VexGuestMIPS32State, guest_ac1); break; in accumulatorGuestRegOffset()
414 ret = offsetof(VexGuestMIPS32State, guest_ac2); break; in accumulatorGuestRegOffset()
416 ret = offsetof(VexGuestMIPS32State, guest_ac3); break; in accumulatorGuestRegOffset()
1039 return IRExpr_Get(offsetof(VexGuestMIPS32State, guest_DSPControl), Ity_I32); in getDSPControl()
1049 stmt(IRStmt_Put(offsetof(VexGuestMIPS32State, guest_DSPControl), e)); in putDSPControl()
1074 return IRExpr_Get(offsetof(VexGuestMIPS32State, guest_HI), Ity_I32); in getHI()
1082 return IRExpr_Get(offsetof(VexGuestMIPS32State, guest_LO), Ity_I32); in getLO()
1090 return IRExpr_Get(offsetof(VexGuestMIPS32State, guest_FCSR), Ity_I32); in getFCSR()
1098 return IRExpr_Get(offsetof(VexGuestMIPS32State, guest_LLaddr), Ity_I32); in getLLaddr()
1106 return IRExpr_Get(offsetof(VexGuestMIPS32State, guest_LLdata), Ity_I32); in getLLdata()
1128 stmt(IRStmt_Put(offsetof(VexGuestMIPS32State, guest_FCSR), e)); in putFCSR()
1136 stmt(IRStmt_Put(offsetof(VexGuestMIPS32State, guest_LLaddr), e)); in putLLaddr()
1144 stmt(IRStmt_Put(offsetof(VexGuestMIPS32State, guest_LLdata), e)); in putLLdata()
1187 d->fxState[0].offset = offsetof(VexGuestMIPS32State, guest_FCSR); in calculateFCSR()
1210 d->fxState[0].offset = offsetof(VexGuestMIPS32State, guest_FCSR); in calculateFCSR()
1239 return IRExpr_Get(offsetof(VexGuestMIPS32State, guest_ULR), Ity_I32); in getULR()
1262 stmt(IRStmt_Put(offsetof(VexGuestMIPS32State, guest_LO), e)); in putLO()
1280 stmt(IRStmt_Put(offsetof(VexGuestMIPS32State, guest_HI), e)); in putHI()
1549 assign(rm_MIPS, binop(Iop_And32, IRExpr_Get(offsetof(VexGuestMIPS32State, in get_IR_roundingmode()
12204 putIReg(11, IRExpr_Get(offsetof(VexGuestMIPS32State, in disInstr_MIPS_WRK()
12234 stmt(IRStmt_Put(offsetof(VexGuestMIPS32State, guest_CMSTART), in disInstr_MIPS_WRK()
12236 stmt(IRStmt_Put(offsetof(VexGuestMIPS32State, guest_CMLEN), in disInstr_MIPS_WRK()
12957 IRExpr_Get(offsetof(VexGuestMIPS32State, in disInstr_MIPS_WRK()
17199 stmt(IRStmt_Put(offsetof(VexGuestMIPS32State, guest_PC), in disInstr_MIPS_WRK()