Lines Matching refs:opV64
12218 IROp opV64 = Iop_INVALID; in disInstr_X86_WRK() local
12227 case 0x03: opV64 = Iop_QAdd16Sx4; str = "addsw"; break; in disInstr_X86_WRK()
12228 case 0x07: opV64 = Iop_QSub16Sx4; str = "subsw"; break; in disInstr_X86_WRK()
12229 case 0x01: opV64 = Iop_Add16x4; str = "addw"; break; in disInstr_X86_WRK()
12230 case 0x05: opV64 = Iop_Sub16x4; str = "subw"; break; in disInstr_X86_WRK()
12231 case 0x02: opV64 = Iop_Add32x2; str = "addd"; break; in disInstr_X86_WRK()
12232 case 0x06: opV64 = Iop_Sub32x2; str = "subd"; break; in disInstr_X86_WRK()
12258 binop(opV64, in disInstr_X86_WRK()
12284 IROp opV64 = Iop_INVALID; in disInstr_X86_WRK() local
12297 case 0x03: opV64 = Iop_QAdd16Sx4; str = "addsw"; break; in disInstr_X86_WRK()
12298 case 0x07: opV64 = Iop_QSub16Sx4; str = "subsw"; break; in disInstr_X86_WRK()
12299 case 0x01: opV64 = Iop_Add16x4; str = "addw"; break; in disInstr_X86_WRK()
12300 case 0x05: opV64 = Iop_Sub16x4; str = "subw"; break; in disInstr_X86_WRK()
12301 case 0x02: opV64 = Iop_Add32x2; str = "addd"; break; in disInstr_X86_WRK()
12302 case 0x06: opV64 = Iop_Sub32x2; str = "subd"; break; in disInstr_X86_WRK()
12337 binop(opV64, in disInstr_X86_WRK()
12341 binop(opV64, in disInstr_X86_WRK()