314    return AMD64Instr_Alu64R(Aalu_MOV, AMD64RMI_Reg(src), dst);  in mk_iMOVsd_RR()
383                    Aalu_MOV,  in iselIntExpr_single_instruction()
400                 Aalu_MOV,  in iselIntExpr_single_instruction()
766                     Aalu_MOV, AMD64RI_Imm(DEFAULT_FPUCW), m8_rsp));  in set_FPU_rounding_default()
794    addInstr(env, AMD64Instr_Alu64R(Aalu_MOV, AMD64RMI_Imm(3), reg));  in set_SSE_rounding_mode()
830    addInstr(env, AMD64Instr_Alu64M(Aalu_MOV,   in set_FPU_rounding_mode()
946          addInstr(env, AMD64Instr_Alu64R(Aalu_MOV,  in iselIntExpr_R_wrk()
1558             addInstr(env, AMD64Instr_Alu64R(Aalu_MOV,   in iselIntExpr_R_wrk()
1622             addInstr(env, AMD64Instr_Alu64R( Aalu_MOV,   in iselIntExpr_R_wrk()
1648             addInstr(env, AMD64Instr_Alu64R( Aalu_MOV,   in iselIntExpr_R_wrk()
1664                              Aalu_MOV, AMD64RMI_Mem(m8_rsp), dst));  in iselIntExpr_R_wrk()
1724             addInstr(env, AMD64Instr_Alu64R( Aalu_MOV,   in iselIntExpr_R_wrk()
1728             addInstr(env, AMD64Instr_Alu64R( Aalu_MOV,   in iselIntExpr_R_wrk()
1780                           Aalu_MOV,   in iselIntExpr_R_wrk()
1810          addInstr(env, AMD64Instr_Alu64R( Aalu_MOV, AMD64RMI_Mem(am), dst ));  in iselIntExpr_R_wrk()
1855          addInstr(env, AMD64Instr_Alu64R(Aalu_MOV, rmi, r));  in iselIntExpr_R_wrk()
1908          addInstr(env, AMD64Instr_Alu64R(Aalu_MOV,AMD64RMI_Mem(m8_rsp),dst));  in iselIntExpr_R_wrk()
2229       addInstr(env, AMD64Instr_Alu64R(Aalu_MOV,AMD64RMI_Imm(0),r));  in iselCondCode_wrk()
3066             addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, src, m8_rsp));  in iselDblExpr_wrk()
3276          addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, ri, rsp_m32));  in iselVecExpr_wrk()
3326          addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, AMD64RI_Reg(srcI), rsp_m16));  in iselVecExpr_wrk()
3349          addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, qHi, m8_rsp));  in iselVecExpr_wrk()
3350          addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, qLo, m16_rsp));  in iselVecExpr_wrk()
4243       addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, q3, m8_rsp));  in iselDVecExpr_wrk()
4244       addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, q2, m16_rsp));  in iselDVecExpr_wrk()
4247       addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, q1, m8_rsp));  in iselDVecExpr_wrk()
4248       addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, q0, m16_rsp));  in iselDVecExpr_wrk()
4376          addInstr(env, AMD64Instr_Alu64M(Aalu_MOV,ri,am));  in iselStmt()
4427                      Aalu_MOV,  in iselStmt()
4499          addInstr(env, AMD64Instr_Alu64M( Aalu_MOV, ri, am ));  in iselStmt()
4526             addInstr(env, AMD64Instr_Alu64R(Aalu_MOV, AMD64RMI_Reg(src), dst));  in iselStmt()
4537          addInstr(env, AMD64Instr_Alu64R(Aalu_MOV,rmi,dst));  in iselStmt()